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| 型號： | EVAL-ADAU1442EBZ |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 44/93頁 |
| 文件大小： | 0K |
| 描述： | BOARD EVAL FOR ADAU1442 |
| 標準包裝： | 1 |
| 系列： | SigmaDSP® |
| 主要目的： | 音頻，音頻處理 |
| 嵌入式： | 是，DSP |
| 已用 IC / 零件： | ADAU1442 |
| 主要屬性： | 單芯片多通道 28/56 位音頻 DSP |
| 次要屬性： | I²C & SPI 接口 |
| 已供物品： | 電路板，線纜，說明文檔，GPIO 子板，電源 |
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ADAU1442/ADAU1445/ADAU1446
Data Sheet
Rev. D | Page 48 of 92
Flexible Audio Routing Matrix—Input Side
Up until this point in the audio signal flow, all signals can be
asynchronous to each other. However, before entering the DSP
for processing, the signals must be synchronized to the same
clock. Therefore, on the input side of the routing matrix, the
input channels can be routed, if desired, to the ASRCs for
sample rate conversion. The input side of the routing matrix is
represented in Figure 39 as a large gray box.
TO ASRCs
0, 1
2, 3
4, 5
6, 7
8, 9
10, 11
12, 13
14, 15
INPUT
CHANNELS
(24 CH)
0, 1
2, 3
4, 5
6, 7
8, 9
10, 11
12, 13
14, 15
16, 17
18, 19
20, 21
22, 23
0, 1
2, 3
4, 5
6, 7
8, 9
10, 11
12, 13
14, 15
16, 17
18, 19
20, 21
22, 23
S/PDIF Rx
DSP
FROM DSP
FLE
X
IB
LE
A
U
D
IO
R
OU
TIN
G
M
A
TR
IX
INP
UT
S
IDE
07696-
040
Figure 39. Flexible Audio Routing Matrix—Input Side
As shown in Figure 39, Input Channels[23:0] are hardwired
to DSP Inputs[23:0]. However, Input Channels[23:0] are also
available at the input side of FARM to be routed to the ASRCs.
Note that there are 13 channel pairs available on the left side of
FARM (12 input channel pairs and one S/PDIF Rx pair) and
eight channel pairs coming from the top (DSP-to-ASRC pairs).
These make up the 21 input channel pairs available to the input
side of the routing matrix. In the lower right, there are eight
channel pairs output from the routing matrix (inputs to the
ASRCs). These make up the eight output channel pairs available
to the input side of the routing matrix. Because audio is always
routed in pairs, a one-to-one connection can be made between
any input pair and any output pair. Therefore, any input channel
pair, S/PDIF Rx channel pair, or DSP-to-ASRC channel pair can
be connected to any ASRC input pair. Any combination is
possible, as long as a one-to-one relationship is maintained.
Note that most applications require sample rate conversion of
the S/PDIF Rx signal.
In the case of the ADAU1442, there are eight 2-channel ASRCs.
Therefore, Stereo ASRC Input Pair 0 (composed of Channel 0
and Channel 1) corresponds to the first ASRC (Stereo ASRC 0).
Stereo ASRC Input Pair 1 (composed of Channel 2 and Channel 3)
corresponds to the second ASRC (Stereo ASRC 1). Stereo ASRC
Input Pair 2 (composed of Channel 4 and Channel 5) corresponds
to the third ASRC (Stereo ASRC 2). Stereo ASRC Input Pair 3
(composed of Channel 6 and Channel 7) corresponds to the fourth
ASRC (Stereo ASRC 3). Stereo ASRC Input Pair 4 (composed of
Channel 8 and Channel 9) corresponds to the fifth ASRC (Stereo
ASRC 4). Stereo ASRC Input Pair 5 (composed of Channel 10 and
Channel 11) corresponds to the sixth ASRC (Stereo ASRC 5). Stereo
ASRC Input Pair 6 (composed of Channel 12 and Channel 13)
corresponds to the seventh ASRC (Stereo ASRC 6). Stereo ASRC
Input Pair 7 (composed of Channel 14 and Channel 15) corre-
sponds to the eighth ASRC (Stereo ASRC 7).
In the case of the ADAU1445, there are two 8-channel ASRCs.
Therefore, Stereo ASRC Input Pairs[3:0] (composed of Channel 0
to Channel 7) correspond to the first ASRC (Stereo ASRC[3:0])
and must be synchronous to each other. Stereo ASRC Input
Pairs[7:4] (composed of Channel 8 to Channel 15) correspond
to the second ASRC (Stereo ASRC[7:4]), and must be synchronous
to each other.
In the case of the ADAU1446, there are no sample rate converters;
therefore, after the automatic channel assignment, the stereo input
pairs are hardwired to the DSP core and the input side of the
routing matrix is not used. This is shown in Figure 40.
INPUT
CHANNELS
(24 CH)
0, 1
2, 3
4, 5
6, 7
8, 9
10, 11
12, 13
14, 15
16, 17
18, 19
20, 21
22, 23
SERIAL
INPUT
PORTS
(×9)
SERIAL
INPUT
MODES
AUT
O
M
AT
IC
I
NP
UT
CHANNE
L
AS
S
IG
NM
E
NT
SDATA_IN0
SDATA_IN1
SDATA_IN2
SDATA_IN3
SDATA_IN4
SDATA_IN5
SDATA_IN6
SDATA_IN7
SDATA_IN8
SERIAL I/O
(24 CH)
DSP CORE
07696-
041
Figure 40. Input Routing in the ADAU1446
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| EVAL-ADAU1446EBZ | 功能描述:BOARD EVAL FOR ADAU1446 RoHS:是 類別:編程器，開發(fā)系統(tǒng) >> 評估演示板和套件 系列:SigmaDSP® 標準包裝:1 系列:PCI Express® (PCIe) 主要目的:接口，收發(fā)器，PCI Express 嵌入式:- 已用 IC / 零件:DS80PCI800 主要屬性:- 次要屬性:- 已供物品:板 |
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