
2.3 Parallel Ports
69
(2) DDR 0, 1, 2, 3, 4, 6 (Port direction registers)
s Register Allocation
[CAUTION]
Port 3 bits 15 to 12 have no register bit.
Port 4 bit 7 has no register bit.
Port 5 has no DDR.
Port 6 bit 7 has no register bit.
s Register Description
When the corresponding signal pins are functioning as ports, the function of each pin is controlled as
follows.
0: Input mode
1: Output mode
Values are initialized to ‘0’ at a reset.
[CAUTION]
Port 6 should be placed in output mode when it is used as a multi-function timer output
pin.
(3) ADER (Analog input enable register)
s Register Description
Port 5 signal pins are controlled as follows.
0: Port input mode
1: Analog input mode
The reset value is ‘1.’
[CAUTION]
Be sure to select analog input mode whenever this port is used for analog input. This is
because input of intermediate-level signals in port input mode will produce leak current.
DDx7 DDx6 DDx5 DDx4 DDx3 DDx2 DDx1 DDx0
Port direction register
Address : DDR1 000011H
Bit no.
Read/write
(R/W) (R/W) (R/W) (R/W) (R/W) (R/W) (R/W) (R/W)
Initial value
(0)
DDR3 000013H
15
14
13
12
11
10
9
8
DDx7 DDx6 DDx5 DDx4 DDx3 DDx2 DDx1 DDx0
Bit no.
Read/write
(R/W) (R/W) (R/W) (R/W) (R/W) (R/W) (R/W) (R/W)
Initial value
(0)
Port direction register
Address : DDR0 000010H
DDR2 000012H
7
6
5
4
3
2
1
0
DDRx
DDR4 000014H
DDR6 000016H
DDRx
ADE7 ADE6 ADE5 ADE4 ADE3 ADE2 ADE1 ADE0
Bit no.
Read/write
(R/W) (R/W) (R/W) (R/W) (R/W) (R/W) (R/W) (R/W)
Initial value
(1)
Analog input enable register
Address : 000015H
15
14
13
12
11
10
9
8
ADER