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2.8 16-Bit Reload Timer (with Event Count Function)
159
(3) TPCR (Timer Pin Control Registers)
s Register Configuration
s Register Description
This register is used to set functions (timer channel, I/O switching) for each of the timer pins (TIM0 to
TIM3). This register should only be rewritten when the CNTE bit is set to ‘0.’
s Bit Description
[Bits 14, 10, 6, 2] OTE3 to OTE0 (Output enable)
The register contains four output enable bits. When the bit value is ‘0’ the corresponding timer pin
TIM functions as a timer input pin TIN (or general-purpose port), and when the value is ‘1’ the
corresponding pin functions as a timer output pin TOT. The output waveform in reload mode is a
toggle-output wave, and in one-shot mode the output is a square wave to indicate that the counting is
in progress.
[Bits 13, 12/9, 8/5, 4/1, 0] CSB, CSA (Channel select)
These bits select the timer channel for each timer pin. Timer channel selections are listed in Table
2.8.5.
Table 2.8.5 OTE, CSB, CSA Bit Selections
Be careful that more than one timer input pin is not selected for the same timer channel.
Also note that any timer channel input (TIN) for which no timer input pins are selected will yield an
‘L’ level input signal.
OTEn
CSBn
CSAn
TIMn pin function
Remarks
0
TIN0
Channel 0 input
TIM0 initial status
0
1
TIN1
Channel 1 input
TIM1 initial status
0
1
0
TIN2
Channel 2 input
TIM2 initial status
0
1
TIN3
Channel 3 input
TIM3 initial status
1
0
TOT0
Channel 0 output
1
0
1
TOT1
Channel 1 output
1
0
TOT2
Channel 2 output
1
TOT3
Channel 3 output
–
OTE3 CSB3 CSA3
–
OTE2 CSB2 CSA2
Timer pin control register - high
Address : 000057H
Bit no.
Read/write
–
(R/W) (R/W) (R/W)
–
(R/W) (R/W) (R/W)
Initial value
–
(0)
(1)
–
(0)
(1)
(0)
15
14
13
12
11
10
9
8
–
OTE1 CSB1 CSA1
–
OTE0 CSB0 CSA0
Bit no.
Read/write
–
(R/W) (R/W) (R/W)
–
(R/W) (R/W) (R/W)
Initial value
–
(0)
(1)
–
(0)
Timer pin control register - low
Address : 000004H
7
6
5
4
3
2
1
0
TPCR