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2.6 10-Bit 8-Input Channel A/D Converter (with 8-bit Resolution Mode)
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Chapter 2: Hardware
s Conversion Data Protection Function
A feature of the A/D converter is a conversion data protection function that allows the unit to protect
the results of continuous conversion and multiple data sets.
Because there is only one conversion data register, continuous A/D conversion means that the last data
in the register is lost each time conversion results are stored after a conversion cycle ends. To protect
against loss of data, the A/D converter has a function that causes it to pause without storing the new
data in the register even if the current conversion cycle ends until the previous data has been transferred
to memory by I2OS.
The pause is cancelled when the I2OS transfer to memory is completed, and conversion resumes.
If the previous data is transferred to memory in time, A/D conversion continues without pause.
[CAUTION]
This function is related to the INT and INTE bits in the ADCS1 register.
The data protection function has been designed to operate only in interrupt-enabled
(INTE=1) state.
If the interrupt is disabled (INTE=0), this function will not operate and continuous A/D
conversion processing will cause the previous set of conversion data to be lost when the
next set is stored in the register.
Also, in interrupt-enabled mode (INTE=1), the INT bit cannot be cleared without using
I2OS so that the data protection function may force A/D conversion to stay in a state of
pause. In this case, an interrupt sequence is used to clear the INT bit and release the pause.
If interrupts are disabled while the A/D converter is in a state of pause during I2OS
transfer, it is possible that the A/D converter will resume operation and the contents of the
conversion data register may be lost before transfer can be completed.
Also, applying a restart during a state of pause destroys data waiting in the register.