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6437E–ATARM–23-Apr-13
SAM9M11
39. USB High Speed Host Port (UHPHS)
39.1
Description
The USB High Speed Host Port (UHPHS) interfaces the USB with the host application. It han-
dles Open HCI protocol (Open Host Controller Interface) as well as Enhanced HCI protocol
(Enhanced Host Controller Interface).
39.2
Embedded Characteristics
The SAM9M11 features USB communication ports as follows:
2 Ports USB Host full speed OHCI and High speed EHCI
1 Device High speed
USB Host Port A is directly connected to the first UTMI transceiver.
The Host Port B is multiplexed with the USB device High speed and connected to the second
UTMI port. The selection between Host Port B and USB device high speed is controlled by the
UDPHS enable bit located in the UDPHS_CTRL control register.
Figure 39-1. USB Selection
Compliant with Enhanced HCI Rev 1.0 Specification
– Compliant with USB V2.0 High-speed and Full-speed Specification
– Supports Both High-speed 480Mbps and Full-speed 12 Mbps USB devices
Compliant with Open HCI Rev 1.0 Specification
– Compliant with USB V2.0 Full-speed and Low-speed Specification
– Supports Both Low-speed 1.5 Mbps and Full-speed 12 Mbps USB devices
Root Hub Integrated with 2 Downstream USB Ports
Shared Embedded USB Transceivers
39.2.1
EHCI
The USB Host Port controller is fully compliant with the Enhanced HCI specification. The USB
Host Port User Interface (registers description) can be found in the Enhanced HCI Rev 1.0
Specification available on http://www.intel.com/technology/usb/ehcispec.htm. The standard
EHCI USB stack driver can be easily ported to Atmel’s architecture in the same way all existing
class drivers run, without hardware specialization.
HS
Transceiver
DMA
HS
USB
DMA
HS EHCI
FS OHCI
PA
PB
HS
Transceiver
1
0
EN_UDPHS