![](http://datasheet.mmic.net.cn/180000/MT47H128M8HV-187ELIT-E_datasheet_11334050/MT47H128M8HV-187ELIT-E_28.png)
Table 10: DDR2 IDD Specifications and Conditions (Die Revisions E, G, and H)
Notes: 1–7 apply to the entire table
Parameter/Condition
Symbol Configuration -187E
-25E/
-25
-3E/
-3
-37E
-5E
Units
Operating one bank active-
precharge current:
tCK = tCK (IDD), tRC = tRC (IDD), tRAS
= tRAS MIN (IDD); CKE is HIGH, CS# is
HIGH between valid commands; Ad-
dress bus inputs are switching; Data
bus inputs are switching
IDD0
x4, x8
115
90
85
70
mA
x16
180
150
135
110
Operating one bank active-read-
precharge current: IOUT = 0mA; BL
= 4, CL = CL (IDD), AL = 0; tCK = tCK
(IDD), tRC = tRC (IDD), tRAS = tRAS
MIN (IDD), tRCD = tRCD (IDD); CKE is
HIGH, CS# is HIGH between valid
commands; Address bus inputs are
switching; Data pattern is same as
IDD4W
IDD1
x4, x8
130
110
100
95
90
mA
x16
210
175
130
120
115
Precharge power-down current:
All banks idle; tCK = tCK (IDD); CKE
is LOW; Other control and address
bus inputs are stable; Data bus in-
puts are floating
IDD2P
x4, x8, x16
7
mA
Precharge quiet standby
current: All banks idle;
tCK = tCK (IDD); CKE is HIGH, CS# is
HIGH; Other control and address
bus inputs are stable; Data bus in-
puts are floating
IDD2Q
x4, x8
60
50
40
35
mA
x16
90
75
65
45
40
Precharge standby current: All
banks idle; tCK = tCK (IDD); CKE is
HIGH, CS# is HIGH; Other control
and address bus inputs are switch-
ing; Data bus inputs are switching
IDD2N
x4, x8
60
50
40
35
mA
x16
95
80
70
50
40
Active power-down current: All
banks open; tCK = tCK (IDD); CKE is
LOW; Other control and address
bus inputs are stable; Data bus in-
puts are floating
IDD3Pf
Fast exit
MR12 = 0
50
40
30
mA
IDD3Ps
Slow exit
MR12 = 1
10
Active standby current: All banks
open; tCK = tCK (IDD), tRAS = tRAS
MAX (IDD), tRP = tRP (IDD); CKE is
HIGH, CS# is HIGH between valid
commands; Other control and ad-
dress bus inputs are switching; Data
bus inputs are switching
IDD3N
x4, x8
70
60
55
45
40
mA
x16
95
85
75
60
55
1Gb: x4, x8, x16 DDR2 SDRAM
Electrical Specifications – IDD Parameters
PDF: 09005aef821ae8bf
1GbDDR2.pdf – Rev. S 10/09 EN
28
Micron Technology, Inc. reserves the right to change products or specifications without notice.
2004 Micron Technology, Inc. All rights reserved.