參數(shù)資料
型號： ORSO42G5-2BM484I
廠商： Lattice Semiconductor Corporation
文件頁數(shù)： 14/153頁
文件大小： 0K
描述： IC FPSC TRANSCEIVER 4CH 484-BGA
產(chǎn)品變化通告： Product Discontinuation 01/Aug/2011
標(biāo)準(zhǔn)包裝： 60
系列： *
Lattice Semiconductor
ORCA ORSO42G5 and ORSO82G5 Data Sheet
110
High Speed Data Receiver
Table 43 species receiver parameters measured on devices with worst case process parameters and over the full
range of operation conditions.
Table 43. External Data Input Specications
Input Data Jitter Tolerance
A receiver’s ability to tolerate incoming signal jitter is very dependent on jitter type. High speed serial interface stan-
dards have recognized the dependency on jitter type and have recently modified specifications to indicate toler-
ance levels for different jitter types as they relate to specific protocols. Sinusoidal jitter is considered to be a worst
case jitter type. Table 44 shows receiver specifications with 10 MHz sinusoidal jitter injection. Other jitter tolerance
measurements were measured in a separate experiment detailed in technical note TN1032, SERDES Test Chip Jit-
ter, and are not reected in these results.
Table 44. Receiver Sinusoidal Jitter Tolerance Specications
Parameter
Conditions
Min.
Typ.
Max.
Units
Input Data
Stream of Nontransitions
Scrambler off
—
72
Bits
Sensitivity (differential), worst-case
1
2.7Gbps
80
—
mVp-p
Input Levels
2
—
VSS - 0.3
—
VDD_ANA + 0.3
V
Internal Buffer Resistance (Each input to VDDIB)
—
40
50
60
Ω
PLL Lock Time
3
—
Note 2
—
1. With PRBS 2^7-1 data pattern, all channels operating, FPGA logic active, REFCLK jitter of 30 ps., TA = 0
oC to 85oC, 1.425V to 1.575V sup-
ply.
2. Input level min + (input peak to peak swing)/2 ≤ common mode input voltage ≤ input level max - (input peak to peak swing)/2
3. The ORT82G5 SERDES receiver performs four levels of synchronization on the incoming serial data stream, providing rst bit, then byte
(character), then channel (32-bit word), and nally optional multi-channel alignment as described in TN1025. The PLL Lock Time is the
time required for the CDR PLL to lock to the transitions in the incoming high-speed serial data stream. If the PLL is unable to lock to the
serial data stream, it instead locks to REFCLK to stabilize the voltage-controlled oscillator (VCO), and periodically switches back to the
serial data stream to again attempt synchronization.
Parameter
Conditions
Max.
Unit
Input Data
Jitter Tolerance @ 2.7Gbps, Typical
600 mV diff eye
1
0.75
UIP-P
Jitter Tolerance @ 2.7Gbps, Worst case
600 mV diff eye
1
0.65
UIP-P
Jitter Tolerance @ 2.5Gbps,Typical
600 mV diff eye
1
0.79
UIP-P
Jitter Tolerance @ 2.5Gbps, Worst case
600 mV diff eye
1
0.67
UIP-P
1. With PRBS 2^7-1 data pattern, all channels operating, FPGA logic active, REFCLK jitter of 30 ps., TA = 0
oC to 85oC, 1.425V
to 1.575V supply. Jitter measured with a Wavecrest SIA-3000.
相關(guān)PDF資料
PDF描述
PIC32MX575F512L-80I/BG IC MCU 32BIT 512KB FLASH 121XBGA
ORSO42G5-1BM484I IC FPSC TRANSCEIVER 4CH 484-BGA
PIC18F4682-I/ML IC PIC MCU FLASH 40KX16 44QFN
ORT8850L-2BMN680I IC TRANCEIVERS FPSC 680FPGAM
ORT8850L-1BMN680C IC TRANCEIVERS FPSC 680FPGAM
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
ORSO42G5-2BMN484C 功能描述:FPGA - 現(xiàn)場可編程門陣列 10368 LUT 204 I/O RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-256
ORSO42G5-2BMN484I 功能描述:FPGA - 現(xiàn)場可編程門陣列 10368 LUT 204 I/O RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-256
ORSO42G5-3BM484C 功能描述:FPGA - 現(xiàn)場可編程門陣列 10368 LUT 204 I/O RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-256
ORSO42G5-3BMN484C 功能描述:FPGA - 現(xiàn)場可編程門陣列 10368 LUT 204 I/O RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-256
ORSO42G5-EV 功能描述:可編程邏輯 IC 開發(fā)工具 Eval Brd ORSO42G5 RoHS:否 制造商:Altera Corporation 產(chǎn)品:Development Kits 類型:FPGA 工具用于評估:5CEFA7F3 接口類型: 工作電源電壓:
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。

采購需求

(若只采購一條型號，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進(jìn)入我的后臺，查看報價

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進(jìn)入我的后臺，查看報價

*型號 *數(shù)量 廠商 批號 封裝
添加更多采購

我的聯(lián)系方式

*
*
*