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參數(shù)資料
| 型號： | ORSO42G5-2BM484I |
| 廠商： | Lattice Semiconductor Corporation |
| 文件頁數(shù)： | 82/153頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC FPSC TRANSCEIVER 4CH 484-BGA |
| 產(chǎn)品變化通告： | Product Discontinuation 01/Aug/2011 |
| 標(biāo)準(zhǔn)包裝： | 60 |
| 系列： | * |
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Lattice Semiconductor
ORCA ORSO42G5 and ORSO82G5 Data Sheet
34
ment FIFO should be at exactly the same frequency (0 ppm difference), i.e., from a common clock source. Later in
this data sheet, Figures 22, 23, 27, 28, and 29 show the recommended clocking scheme to adhere to this require-
ment. In addition, supervisory features such as BIP error check, OOF check, RDI monitoring and AIS-L insertion
during OOF are also implemented. All the supervisory features are controlled through programmable register bits.
Framer
The frame and byte phase of the bits within the 32-bit word from the DEMUX is random. For each of the STS-48
channels, the framer outputs 4 bytes (32-bits) that are frame-aligned and a frame pulse that is one clock-wide. The
transition from A1 bytes to A2 bytes should happen on a 32-bit boundary. If any two consecutive bytes of the 4-
byte-aligned word match the A1-A2 pattern (0xF628 in standard SONET framing), the byte-aligned word will be
byte rotated to achieve frame alignment.
Framer State Machine (FSM)
The framer FSM is responsible for detecting the in-frame and Out-Of-Frame status of the incoming data and sends
out alarms (interrupts) on Out-Of-Frame (OOF). The framer is a pseudo-SONET framer in the sense that it does
not support LOF or SEF detect-alarm signal as specied in the GR-253 standard.
The framer has a fast frame mode where a single good framing pattern can cause the framer state machine to go
the “in_frm” state and a single bad frame can cause the state machine to declare “OOF” (See Fig. 19). The fast
frame mode can be set by the software register bit, FFRM_EN_xx.
The FSM is a four byte framer and searches for the framing pattern based on the 32-bit words. Accordingly, the
framing pattern is four A1 bytes (F6,F6,F6,F6) followed by four A2 bytes (28,28,28,28).
The framer FSM comes out of reset in the “OOF” state with the OOF alarm set. The framer goes in frame if it nds
2 consecutive frames with the desired framing bytes and goes out of frame if it nds 4 consecutive frames with at
least one framing bit error in each frame. Frame timing is also synchronized based on the STS-48 row and column
counters. This corresponds to SONET specication that it will take two consecutive valid framing patterns to frame
to an incoming signal. Outside the “OOF” state, the OOF alarm output is low.
Figure 19. Transmit Clocking Diagram in SONET Mode
pat_srch
reset
OOF=1
patdet & !ffm
new_frm
in_frm
patdet
OOF=0
!patdet
oof_one
oof_two
oof_three
Legend:
ffm ~ In fast frame mode
AND ffm
!ffm AND
patdet
!patdet
patdet
!patdet
patdet
!patdet
!ffm ~ In regular frame
mode
patdet ~ Correct 4A1/4A2
framing pattern
detected
!patdet ~ Correct 4A1/4A2
framing pattern
NOT detected
!patdet
patdet
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ORSO42G5-2BMN484C | 功能描述:FPGA - 現(xiàn)場可編程門陣列 10368 LUT 204 I/O RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-256 |
| ORSO42G5-2BMN484I | 功能描述:FPGA - 現(xiàn)場可編程門陣列 10368 LUT 204 I/O RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-256 |
| ORSO42G5-3BM484C | 功能描述:FPGA - 現(xiàn)場可編程門陣列 10368 LUT 204 I/O RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-256 |
| ORSO42G5-3BMN484C | 功能描述:FPGA - 現(xiàn)場可編程門陣列 10368 LUT 204 I/O RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-256 |
| ORSO42G5-EV | 功能描述:可編程邏輯 IC 開發(fā)工具 Eval Brd ORSO42G5 RoHS:否 制造商:Altera Corporation 產(chǎn)品:Development Kits 類型:FPGA 工具用于評估:5CEFA7F3 接口類型: 工作電源電壓: |
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