參數(shù)資料
型號： ORSO42G5-2BM484I
廠商： Lattice Semiconductor Corporation
文件頁數(shù)： 97/153頁
文件大?。?/td> 0K
描述： IC FPSC TRANSCEIVER 4CH 484-BGA
產(chǎn)品變化通告： Product Discontinuation 01/Aug/2011
標準包裝： 60
系列： *
Lattice Semiconductor
ORCA ORSO42G5 and ORSO82G5 Data Sheet
48
Alignment Mode Setup Procedures – ORSO82G5
The control register bits for alignment FIFO in the ORSO42G5 and ORSO82G5 are described below.
Table 8. Multichannel Alignment Modes – ORSO82G5
To align all eight channels:
FMPU_SYNMODE_A[A:D] = 11
FMPU_SYNMODE_B[A:D] = 11
To align twin channels in SERDES A:
FMPU_SYNMODE_A[A:D] = 01
To align four channels in SERDES A:
FMPU_SYNMODE_AB = 10
FMPU_SYNMODE_AD = 10
Similar alignment can be dened for SERDES B. To enable/disable synchronization signal of individual channel
within a multi-channel alignment group:
FMPU_STR_EN_xx = 1 enabled
FMPU_STR_EN_xx = 0 disabled
where xx is one of A[A:D] and B[A:D].
To re-synchronize a multi-channel alignment group
Set the following bit to zero, and then set it to 1 since it is a rising edge sensitive bit.
FMPU_RESYNC8 for eight channel A[A:D] and B[A:D]
FMPU_RESYNC4A for block channel A[A:D]
FMPU_RESYNC2A1 for twin channel A[A:B]
FMPU_RESYNC2A2 for twin channel A[C:D]
FMPU_RESYNC4B for block channel B[A:D]
Re-synchronization will cause the multi-channel alignment group to perform a new synchronization procedure. This
would need to occur if a link is removed from an alignment group and then paced back into service as part of the
alignment group. This is not required at power up if the alignment mode is set before the channels receive the rst
frame pulse.
Register Bits
FMPU_SYNMODE_xx
Mode
00
No multichannel alignment. (default)
01
Twin channel alignment
10
Block channel alignment
11
Eight channel alignment
Note: Where xx is one of A[A:D] and B[A:D].
相關(guān)PDF資料
PDF描述
PIC32MX575F512L-80I/BG IC MCU 32BIT 512KB FLASH 121XBGA
ORSO42G5-1BM484I IC FPSC TRANSCEIVER 4CH 484-BGA
PIC18F4682-I/ML IC PIC MCU FLASH 40KX16 44QFN
ORT8850L-2BMN680I IC TRANCEIVERS FPSC 680FPGAM
ORT8850L-1BMN680C IC TRANCEIVERS FPSC 680FPGAM
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
ORSO42G5-2BMN484C 功能描述:FPGA - 現(xiàn)場可編程門陣列 10368 LUT 204 I/O RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-256
ORSO42G5-2BMN484I 功能描述:FPGA - 現(xiàn)場可編程門陣列 10368 LUT 204 I/O RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-256
ORSO42G5-3BM484C 功能描述:FPGA - 現(xiàn)場可編程門陣列 10368 LUT 204 I/O RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-256
ORSO42G5-3BMN484C 功能描述:FPGA - 現(xiàn)場可編程門陣列 10368 LUT 204 I/O RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-256
ORSO42G5-EV 功能描述:可編程邏輯 IC 開發(fā)工具 Eval Brd ORSO42G5 RoHS:否 制造商:Altera Corporation 產(chǎn)品:Development Kits 類型:FPGA 工具用于評估:5CEFA7F3 接口類型: 工作電源電壓:
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。

采購需求

(若只采購一條型號，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進入我的后臺，查看報價

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進入我的后臺，查看報價

*型號 *數(shù)量 廠商 批號 封裝
添加更多采購

我的聯(lián)系方式

*
*
*