參數(shù)資料
型號: ORSO42G5-2BM484I
廠商: Lattice Semiconductor Corporation
文件頁數(shù): 56/153頁
文件大?。?/td> 0K
描述: IC FPSC TRANSCEIVER 4CH 484-BGA
產(chǎn)品變化通告: Product Discontinuation 01/Aug/2011
標準包裝: 60
系列: *
Lattice Semiconductor
ORCA ORSO42G5 and ORSO82G5 Data Sheet
149
Note that ΘJB is expressed in units of °C/W and that this parameter and the way it is measured are still being dis-
cussed by the JEDEC committee.
FPSC Maximum Junction Temperature
Once the power dissipated by the FPSC has been determined, the maximum junction temperature of the FPSC
can be found. This is needed to determine if speed derating of the device from the 85 °C junction temperature used
in all of the delay tables is needed. Derating calculations for other temperatures than 85 °C and for other voltages
can be made within the ispLEVER software environment. Using the maximum ambient temperature, TAmax, and the
power dissipated by the device, Q (expressed in °C), the maximum junction temperature is approximated by:
(5)
Package Thermal Characteristics
The thermal characteristics of the 484-ball PBGAM (fpBGA with heat spreader) used for the ORT42G5, 680-ball
PBGAM (fpBGA with heat spreader) and 680-ball fpBGA used for the ORT82G5 are available in the Thermal Man-
agement section of the Lattice web site at www.latticesemi.com.
Heat Sink Vendors for BGA Packages
The estimated worst-case power requirements for the ORSO42G5 and ORSO82G5 are in the 3 W to 5 W range.
Consequently, for most applications an external heat sink will be required. Table 53 lists, in alphabetical order, heat
sink vendors who advertise heat sinks aimed at the BGA market.
Table 53. Heat Sink Vendors
Package Parasitics
The electrical performance of an IC package, such as signal quality and noise sensitivity, is directly affected by the
package parasitics. Table 54 lists eight parasitics associated with the ORCA packages. These parasitics represent
the contributions of all components of a package, which include the bond wires, all internal package routing, and
the external leads.
Four inductances in nH are listed: LSW and LSL, the self-inductance of the lead; and LMW and LML, the mutual
inductance to the nearest neighbor lead. These parameters are important in determining ground bounce noise and
inductive crosstalk noise. Three capacitances in pF are listed: CM, the mutual capacitance of the lead to the near-
est neighbor lead; and C1 and C2, the total capacitance of the lead to all other leads (all other leads are assumed
to be grounded). These parameters are important in determining capacitive crosstalk and the capacitive loading
effect of the lead. Resistance values are in mΩ.
The parasitic values in Table 54 are for the circuit model of bond wire and package lead parasitics. If the mutual
capacitance value is not used in the designer’s model, then the value listed as mutual capacitance should be
added to each of the C1 and C2 capacitors.
Vendor
Location
Phone
Aavid Thermal Technology
Laconia, NH
(603) 527-2152
Chip Coolers
Warwick, RI
(800) 227-0254
IERC
Burbank, CA
(818) 842-7277
R-Theta
Buffalo, NY
(800) 388-5428
Sanyo Denki
Torrance, CA
(310) 783-5400
Thermalloy
Dallas, TX
(214) 243-4321
Wakeeld Engineering
Wakeeld, MA
(617) 246-0874
TJmax = TAmax + (Q ΘJB)
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ORSO42G5-2BMN484I 功能描述:FPGA - 現(xiàn)場可編程門陣列 10368 LUT 204 I/O RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風格:SMD/SMT 封裝 / 箱體:FBGA-256
ORSO42G5-3BM484C 功能描述:FPGA - 現(xiàn)場可編程門陣列 10368 LUT 204 I/O RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風格:SMD/SMT 封裝 / 箱體:FBGA-256
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ORSO42G5-EV 功能描述:可編程邏輯 IC 開發(fā)工具 Eval Brd ORSO42G5 RoHS:否 制造商:Altera Corporation 產(chǎn)品:Development Kits 類型:FPGA 工具用于評估:5CEFA7F3 接口類型: 工作電源電壓: