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    參數(shù)資料
    型號(hào)： pentium II xeon processor
    廠商： Intel Corp.
    英文描述： pentium II xeon processor at 400 and 450 MHZ(工作頻率400和450兆赫茲奔II處理器)
    中文描述： 奔騰II至強(qiáng)處理器400和450兆赫（工作頻率400和450兆赫茲奔二處理器）
    文件頁數(shù)： 17/97頁
    文件大?。?/td> 978K
    代理商： PENTIUM II XEON PROCESSOR
    E
    PENTIUM II XEON PROCESSOR AT 400 AND 450 MHZ
    17
    12/15/98 5:14 PM 24377002.doc
    Table 3. Pentium
    II Xeon Processor System Pin Groups
    Group Name
    Signals
    AGTL+ Input
    BPRI#, BR[3:1]#
    1
    , DEFER#, RESET#, RS[2:0]#, RSP#, TRDY#
    AGTL+ Output
    PRDY#
    AGTL+ I/O
    A[35:03]#, ADS#, AERR#, AP[1:0]#, BERR#, BINIT#, BNR#, BP[3:2]#, BPM[1:0]#,
    BR0#
    1
    , D[63:00]#, DBSY#, DEP[7:0]#, DRDY#, FRCERR, HIT#, HITM#, LOCK#,
    REQ[4:0]#, RP#
    CMOS Input
    A20M#, FLUSH#, IGNNE#, INIT#, LINT0/INTR, LINT1/NMI, PREQ#, PWRGOOD
    2
    ,
    SMI#, SLP#
    2
    , STPCLK#
    CMOS Output
    FERR#, IERR#, THERMTRIP#
    2
    System Bus Clock
    BCLK
    APIC Clock
    PICCLK
    APIC I/O
    3
    PICD[1:0]
    TAP Input
    TCK, TDI, TMS, TRST#
    TAP Output
    3
    TDO
    SMBus Interface
    SMBDAT, SMBCLK, SMBALERT#, WP
    Power/Other
    4
    V
    CCCORE
    , V
    CCL2
    , V
    CCTAP
    , V
    CCSMBus,
    VID_L2[4:0], VID_CORE[4:0], V
    TT
    , V
    SS
    ,
    TEST_25_A62, TEST_VCC_CORE, TEST_VSS, PWR_EN[1:0]
    2
    , RESERVED_XXX,
    SA[2:0], SELFSB0
    NOTES:
    1.
    The BR0# pin is the only BREQ# signal that is bi-directional. The internal BREQ# signals are mapped onto BR# pins
    based on a processor’s agent ID. See Section 9.0. for more information.
    For information on these signals, see Section 9.0.
    These signals are specified for 2.5 V operation.
    V
    CCCORE
    is the power supply for the Pentium
    II Xeon processor core.
    V
    CCL2
    is the power supply for the L2 cache memory.
    VID_CORE[4:0], and VID_L2[4:0] pins are described in Table 2.
    V
    TT
    is used for the AGTL+ termination.
    V
    SS
    is system ground.
    V
    CCTAP
    is the TAP supply.
    V
    CCSMBus
    is the SM bus supply.
    Reserved pins must be left unconnected. Do not connect to each other.
    Test Pins are described in Section 2.6.
    Other signals are described in Section 9.0.
    2.
    3.
    4.
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