參數(shù)資料
型號(hào)： pentium II xeon processor
廠商： Intel Corp.
英文描述： pentium II xeon processor at 400 and 450 MHZ(工作頻率400和450兆赫茲奔II處理器)
中文描述： 奔騰II至強(qiáng)處理器400和450兆赫（工作頻率400和450兆赫茲奔二處理器）
文件頁(yè)數(shù)： 40/97頁(yè)
文件大小： 978K
代理商： PENTIUM II XEON PROCESSOR
PENTIUM II XEON PROCESSOR AT 400 AND 450 MHZ
E
40
12/16/98 11:24 AM 24377002x.doc
2. Auto HALT Power Down State
BCLK running.
Snoops and interrupts allowed.
HALT Instruction and
HALT Bus Cycle Generated
INIT#, BINIT#, INTR, NMI,
SMI#, RESET#
1. Normal State
Normal execution.
STPCLK#
Asserted
STPCLK#
De-asserted
3. Stop Grant State
BCLK running.
Snoops and interrupts allowed.
SLP#
Asserted
SLP#
De-asserted
5. Sleep State
BCLK running.
No snoops or interrupts allowed.
4. HALT/Grant Snoop State
BCLK running.
Service snoops to caches.
Snoop Event Occurs
Snoop Event Serviced
Snoop
Event
Occurs
Snoop
Event
Serviced
STPCLK# Asserted
STPCLK# De-asserted
3770-16
Figure 16. Stop Clock State Machine
4.2.3.
STOP-GRANT STATE—STATE 3
The Stop-Grant state on the Pentium II Xeon
processor is entered when the STPCLK# signal is
asserted. The Pentium II Xeon processor will issue a
Stop-Grant Transaction Cycle. Exit latency from this
mode is 10 BLCK periods after the STPCLK# signal
is deasserted.
Since the AGTL+ signal pins receive power from the
system bus, these pins should not be driven
(allowing the level to return to V
TT
) for minimum
power drawn by the termination resistors in this state.
In addition, all other input pins on the system bus
should be driven to the inactive state.
BINIT# will not be serviced while the processor is in
Stop-Grant state. The event will be latched and can
be serviced by software upon exit from Stop-Grant
state.
FLUSH# will not be serviced during Stop Grant state.
RESET# will cause the processor to immediately
initialize itself; but the processor will stay in Stop
Grant state. A transition back to the Normal state will
occur with the deassertion of the STPCLK# signal.
A transition to the HALT/Grant Snoop state will occur
when the processor detects a snoop phase on the
system bus. A transition to the Sleep state will occur
with the assertion of the SLP# signal.
While in the Stop Grant State, all other interrupts will
be latched by the Pentium II Xeon processor, and
only serviced when the processor returns to the
Normal State.
4.2.4.
HALT/GRANT SNOOP STATE—
STATE 4
The Pentium II Xeon processor will respond to snoop
phase transactions (initiated by ADS#) on the system
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