- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄359439 > VT82C586B (Electronic Theatre Controls, Inc.) PCI INTEGRATED PERIPHERAL CONTROLLER PDF資料下載
參數(shù)資料
| 型號： | VT82C586B |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | PCI INTEGRATED PERIPHERAL CONTROLLER |
| 中文描述： | 整合的周邊控制器的PCI |
| 文件頁數(shù)： | 15/69頁 |
| 文件大小： | 393K |
| 代理商： | VT82C586B |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁當前第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁
9,$7HFKQRORJLHV,QF
VT82C586B
Revision 1.0
May 13, 1997
-9-
Pinouts
On Board Plug and Play
Signal Name
MIRQ0 /
APICCS# /
POS (3040F)
Pin No.
90
I/O
I
O
O
Signal Description
Multifunction Pin
(see PCI Configuration Register Function 0 Rx59[3,0])
MIRQ0.
Steerable interrupt request input for on-board devices.
APICCS#
. Chip select for external IOAPIC chip for symmetric multiprocessor
implementations.
POS.
Power-On Suspend Status Output (see Function 0 Rx59 bit-3). This function
was introduced in rev F of the 3040 silicon and is not available in earlier chips.
Rx59[3]
Rx59[0]
Pin Function
0
0
MIRQ0 (input)
0
1
APICCS# (output)
1
0
-illegal-
1
1
POS (output)
Multifunction Pin
(see PCI Configuration Register Function 0 Rx59[1] & Rx48[4])
MIRQ1.
Steerable interrupt request input for on-board devices.
KEYLOCK.
Keyboard lock input.
IRQ8#.
Interrupt input for external RTC. This function was introduced in
revision F of the 3040 silicon and is not available in earlier chips.
Rx48[4]
Rx59[1]
Pin Function
0
0
MIRQ1 (input)
0
1
KEYLOCK (input)
1
0
-illegal-
1
1
IRQ8# (input) (see also Rx5A[2] and table below). With
this setting, Rx57[3:0] must be set to 0 (MIRQ1 routing)
Rx5A[2]
Rx48[4]
Pin Function
0
0
External RTC - IRQ8# input on pin 104
0
1
External RTC - IRQ8# input on pin 106
1
x
Internal RTC - IRQ8# input not required
Multifunction Pin
(see PCI Configuration Register Function 0 Rx59[2] & Rx48[5])
MIRQ2.
Steerable interrupt request input for on-board devices.
MASTER#.
ISA Master Request indicator. This pin also serves as the direction
control for the IDE interface DD / SA transceivers (see SOE#).
SDDIR.
This pin may be programmed to serve as a direction control for the IDE
interface DD / SA transceivers (see SOE#) separate from MASTER#. This
function was introduced in revision A of the 3041 silicon and not available in
earlier chips.
Rx48[5]
Rx59[2]
Pin Function
0
0
MASTER# (input)
0
1
MIRQ2 (input)
1
0
-illegal-
1
1
SDDIR (output)
MIRQ1 /
KEYLOCK /
IRQ8# (3040F)
106
I
I
I
MIRQ2 /
MASTER# /
SDDIR (3041A)
137
I
I
O
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| VT82C686A | PCI SUPER-I/O INTEGRATED PERIPHERAL CONTROLLER |
| vt82c693 | APOLLO PRO-PLUS |
| VT8371 | KX133 ATHLON NORTH BRIDGE |
| VT83A333 | |
| VT83A334 | |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| VT82C596 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:MOBILE PCI INTEGRATED PERIPHERAL CONTROLLER |
| VT82C596A | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:MOBILE PCI INTEGRATED PERIPHERAL CONTROLLER |
| VT82C596B | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:PCI INTEGRATED PERIPHERAL CONTROLLER |
| VT82C598MVP | 制造商:Via Technologies Inc 功能描述:SYSTEM CONTROLLER, 476 Pin, BGA |
| VT82C686A | 制造商:VIA TECH 功能描述: |
發(fā)布緊急采購，3分鐘左右您將得到回復。