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參數(shù)資料
| 型號： | VT82C586B |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | PCI INTEGRATED PERIPHERAL CONTROLLER |
| 中文描述： | 整合的周邊控制器的PCI |
| 文件頁數(shù)： | 45/69頁 |
| 文件大?。?/td> | 393K |
| 代理商： | VT82C586B |
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VT82C586B
Revision 1.0
May 13, 1997
-
39-
Register Descriptions
USB-Specific Configuration Registers
Offset 40 - Miscellaneous Control 1 ................................ RW
7
PCI Memory Command Option
0
Support Memory-Read-Line, Memory-Read-
Multiple, and Memory-Write-and-Invalidate....
.....................................................default
1
Only support Memory Read, Memory Write
Commands
6
Babble Option
0
Automatically disable babbled port when EOF
babble occurs..........................................default
1
Don’t disable babbled port
5
PCI Parity Check Option
0
Disable PERR# generation.....................default
1
Enable parity check and PERR# generation
4
Reserved
........................................ always reads 0
3
USB Data Length Option
0
Support TD length up to 1280................default
1
Support TD length up to 1023
2
USB Power Management
0
Disable USB power management...........default
1
Enable USB power management
1
DMA Option
0
16 DW burst access................................default
1
8 DW burst access
0
PCI Wait States
0
Zero wait ................................................default
1
One wait
Offset 41 - Miscellaneous Control 2 ................................ RW
7-3
Reserved
........................................ always reads 0
2
Trap Option
0
Set trap 60/64 status bits without checking
enable bits ..............................................default
1
Set trap 60/64 status bits only when trap 60/64
enable bits are set.
1
A20gate Pass Through Option
0
Pass through A20GATE command sequence
defined in UHCI.....................................default
1
Don’t pass through Write I/O port 64 (ff)
0
Reserved
........................................ always reads 0
Offset 60 - Serial Bus Release Number ............................ RO
7-0
Release Number
.............................. always reads 10h
Offset C1-C0 - Legacy Support ........................................ RO
15-0 UHCI v1.1
Compliant
................ always reads 2000h
USB I/O Registers
These registers are compliant with the UHCI v1.1 standard.
Refer to the UHCI v1.1 specification for further details.
Offset 1-0 - USB Command
Offset 3-2 - USB Status
Offset 5-4 - USB Interrupt Enable
Offset 7-6 - Frame Number
Offset B-8 - Frame List Base Address
Offset 0C - Start Of Frame Modify
Offset 11-10 - Port 1 Status / Control
Offset 13-12 - Port 2 Status / Control
Offset 1F-14 - Reserved
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