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參數(shù)資料
| 型號(hào)： | VT82C586B |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | PCI INTEGRATED PERIPHERAL CONTROLLER |
| 中文描述： | 整合的周邊控制器的PCI |
| 文件頁(yè)數(shù)： | 63/69頁(yè) |
| 文件大小： | 393K |
| 代理商： | VT82C586B |
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VT82C586B
Revision 1.0
May 13, 1997
-
57-
Electrical Specifications
Table 9. AC Characteristics - UltraDMA-33 IDE Bus Interface Timing
Symbol
T
ENV1
T
DS1
T
DH1
T
ENV2
T
DVS2
T
DVH2
T
DVS2
T
DVH2
T
RFS
T
RP
T
LI4
T
LI4
T
ZA4
T
DVS4
T
DVH4
T
LI5
T
LI5
T
MIL5
T
DVS5
T
DVH5
T
MIL6
T
ZA6
T
LI5
T
MIL5
T
2
T
3
T
4
T
5
T
WDS
T
WDH
T
RDS
T
RDH
Description
Envelope time for read initial
Data setup time for read initial
Data hold time for read initial (rise)
Envelope time for write initial (rise)
Data setup time for write initial (fall)
Data hold time for write initial (fall)
Data setup time for write initial
Data hold time for write initial
READY to final STROBE time
READY to Pause time
Limited interlock time (to STOP)
Limited interlock time (to Host DMARDY)
Delay time required for output drives turning on
Data setup time for read terminating
Data hold time for read terminating
Limited interlock time (to STOP)
Limited interlock time (to Host STROBE)
Limited interlock time with minimum
Data setup time for write terminating
Data hold time for write terminating
Limited interlock time with minimum
Delay time required for output drives turning on
Limited interlock time
Limited interlock time with minimum
Delay time of PCLK to DCS3,1#
Delay time of PCLK to DA[2:0]
Delay time of PCLK to DIOW#
Delay time of PCLK to DIOR#
Data setup time during PIO write
Data hold time during PIO write
Data setup time during PIO read
Data hold time during PIO read
Timing
29.3
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
1.1
2.3
29.3
42.2
17.8
42.0
17.2
21.3
180.0
95.1
125.3
102.0
55.3
31.6
125.3
95.2
120.6
57.7
31.8
155.8
68.5
65.2
90.6
4.8
5.3
9.3
9.2
85.5
31.7
0.4
2.1
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