參數(shù)資料
型號(hào)： 80376
廠商： Intel Corp.
英文描述： 32-BIT Embedded Microprocessor(32位嵌入式微處理器)
中文描述： 32位嵌入式微處理器（32位嵌入式微處理器）
文件頁(yè)數(shù)： 75/95頁(yè)
文件大?。?/td> 1086K
代理商： 80376
376 EMBEDDED PROCESSOR
Table 8.1. 80376 Instruction Set Clock Count Summary
(Continued)
Clock
Counts
Number
Of Data
Cycles
Instruction
Format
Notes
ARITHMETIC
(Continued)
Register from Memory
0 0 1 0 1 0 0 w
mod reg
r/m
7
**
2
**
a
Memory from Register
0 0 1 0 1 0 1 w
mod reg
r/m
6
*
1
a
Immediate from Register/Memory
1 0 0 0 0 0 s w
mod 1 0 1
r/m immediate data
2/7
**
0/1
**
a
Immediate from Accumulator (Short Form)
0 0 1 0 1 1 0 w
immediate data
2
SBB
e
Subtract with Borrow
Register from Register
0 0 0 1 1 0 d w
mod reg
r/m
2
Register from Memory
0 0 0 1 1 0 0 w
mod reg
r/m
7
**
2
**
a
Memory from Register
0 0 0 1 1 0 1 w
mod reg
r/m
6
*
1
*
a
Immediate from Register/Memory
1 0 0 0 0 0 s w
mod 0 1 1
r/m immediate data
2/7
**
0/2
**
a
Immediate from Accumulator (Short Form)
0 0 0 1 1 1 0 w
immediate data
2
DEC
e
Decrement
Register/Memory
1 1 1 1 1 1 1 w
reg 0 0 1
r/m
2/6
**
0/2
**
a
Register (Short Form)
0 1 0 0 1
reg
2
CMP
e
Compare
Register with Register
0 0 1 1 1 0 d w
mod reg
r/m
2
Memory with Register
0 0 1 1 1 0 0 w
mod reg
r/m
5
*
1
*
a
Register with Memory
0 0 1 1 1 0 1 w
mod reg
r/m
6
**
2
**
a
Immediate with Register/Memory
1 0 0 0 0 0 s w
mod 1 1 1
r/m immediate data
2/5
*
0/1
*
a
Immediate with Accumulator (Short Form)
0 0 1 1 1 1 0 w
immediate data
2
NEG
e
Change Sign
1 1 1 1 0 1 1 w
mod 0 1 1
r/m
2/6
*
0/2
*
a
AAA
e
ASCII Adjust for Add
0 0 1 1 0 1 1 1
4
AAS
e
ASCII Adjust for Subtract
0 0 1 1 1 1 1 1
4
DAA
e
Decimal Adjust for Add
0 0 1 0 0 1 1 1
4
DAS
e
Decimal Adjust for Subtract
0 0 1 0 1 1 1 1
4
MUL
e
Multiply (Unsigned)
Accumulator with Register/Memory
1 1 1 1 0 1 1 w
mod 1 0 0
r/m
MultiplierDByte
12–17/15–20
12–25/15–28
*
12–41/17–46
*
0/1
0/1
*
0/2
*
a,n
a,n
a,n
DWord
DDoubleword
IMUL
e
Integer Multiply (Signed)
Accumulator with Register/Memory
1 1 1 1 0 1 1 w
mod 1 0 1
r/m
MultiplierDByte
12–17/15–20
12–25/15–28
*
12–41/17–46
*
0/1
0/1
*
0/2
*
a,n
a,n
a,n
DWord
DDoubleword
Register with Register/Memory
0 0 0 0 1 1 1 1
1 0 1 0 1 1 1 1
mod reg
r/m
MultiplierDByte
12–17/15–20
12–25/15–28
*
12–41/17–46
*
0/1
0/1
*
0/2
*
a,n
a,n
a,n
DWord
DDoubleword
Register/Memory with Immediate to Register
0 1 1 0 1 0 s 1
mod reg
r/m immediate data
DWord
DDoubleword
13–26/14–27
*
13–42/16–45
*
0/1
*
0/2
*
a,n
a,n
75
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