參數(shù)資料
型號(hào)： AD9547BCPZ
廠商： Analog Devices Inc
文件頁(yè)數(shù)： 48/104頁(yè)
文件大?。?/td> 0K
描述： IC CLOCK GEN/SYNCHRONIZR 64LFCSP
產(chǎn)品變化通告： AD9547 Mask Change 20/Oct/2010
標(biāo)準(zhǔn)包裝： 1
類型： 時(shí)鐘/頻率發(fā)生器，同步器
PLL： 是
主要目的： 以太網(wǎng)，SONET/SDH，Stratum
輸入： CMOS，LVDS，LVPECL
輸出： CMOS，LVDS，LVPECL
電路數(shù)： 1
比率 - 輸入:輸出： 2:2
差分 - 輸入:輸出： 是/是
頻率 - 最大： 750kHz
電源電壓： 1.71 V ~ 3.465 V
工作溫度： -40°C ~ 85°C
安裝類型： 表面貼裝
封裝/外殼： 64-VFQFN 裸露焊盤(pán)，CSP
供應(yīng)商設(shè)備封裝： 64-LFCSP-VQ（9x9）
包裝： 托盤(pán)
AD9547
Data Sheet
Rev. E | Page 48 of 104
Note that conditional processing is applicable only when down-
loading (see the EEPROM Conditional Processing section).
Automatic EEPROM Download
Following power-up, assertion of the RESET pin, or a soft reset
(Register 0x0000, Bit 5 = 1), if FncInit[7:3] ≠ 0 (see the Initial M0
to M7 Pin Programming section), the instruction sequence stored
in the EEPROM executes automatically with condition =
FncInit[7:3]. In this way, a previously stored set of register values
downloads automatically on power-up or with a hard or soft
reset. See the EEPROM Conditional Processing section for
details regarding conditional processing and the way that it
modifies the down-load process.
EEPROM Conditional Processing
The condition instructions allow conditional execution of
EEPROM instructions during a download sequence. During
an upload sequence, however, they are stored as is and have
no effect on the upload process.
Note that, during EEPROM downloads, the condition instructions
themselves and the end instruction always execute unconditionally.
Conditional processing makes use of two elements: the condition
(from Condition 1 to Condition 31) and the condition tag board.
The relationships among the condition, the condition tag board,
and the EEPROM controller appear schematically in Figure 49.
Condition is a 5-bit value with 32 possibilities. Condition = 0 is the
null condition. When the null condition is in effect, the EEPROM
controller executes all instructions unconditionally. The remaining
31 possibilities, condition = 1 through condition = 31, modify the
EEPROM controller’s handling of a download sequence.
The condition originates from one of two sources (see Figure 49),
as follows:
FncInit, Bits[7:3], which is the state of multifunction pins
M3 to M7 at power-up (see the Initial M0 to M7 Pin
Register 0x0E01, Bits[4:0]
If Register 0x0E01, Bits[4:0] ≠ 0, then the condition is the value
stored in Register 0x0E01, Bits[4:0]; otherwise, the condition is
FncInit, Bits[7:3]. Note that a nonzero condition that is present
in Register 0x0E01, Bits[4:0] takes precedence over FncInit,
Bits[7:3].
The condition tag board is a table that is maintained by the
EEPROM controller. When the controller encounters a condition
instruction, it decodes Condition Instruction 0xB1 through Condi-
tion Instruction 0xCF as condition = 1 through condition = 31,
respectively, and tags that particular condition in the condition
tag board. However, Condition Instruction 0xB0 decodes as the
null condition, for which the controller clears the condition tag
board; subsequent download instructions execute unconditionally
(until the controller encounters a new condition instruction).
During download, the EEPROM controller executes or skips
instructions, depending on the value of the condition and the
contents of the condition tag board. Note, however, that condition
instructions and the end instruction always execute uncondi-
tionally during download. If condition = 0, all instructions during
download execute unconditionally. If condition ≠ 0 and there
are any tagged conditions in the condition tag board, the controller
executes instructions only if the condition is tagged.
EXAMPLE
CONDITION 3 AND
CONDITION 13
ARE TAGGED
EEPROM
EEPROM CONTROLLER
UPLOAD
PROCEDURE
CONDITION
HANDLER
DOWNLOAD
PROCEDURE
CONDITION
TAG BOARD
1
6
5
4
3
2
11
10
9
8
7
30
31
24
23
22
21
20
19
18
17
16
15
14
13
12
25
26
27
28
29
IF B1 ≤ INSTRUCTION ≤ CF,
THEN TAG DECODED CONDITION
EXECUTE/SKIP
INSTRUCTION(S)
SCRATCH
PAD
CONDITION
CONDITION = 0x0E01, BITS[4:0]
ELSE
CONDITION = FncInit, BITS[7:3]
ENDIF
M7
M3
IF INSTRUCTION = B0,
THEN CLEAR ALL TAGS
FncInit, BITS[7:3]
REGISTER
0x0E01, BITS[4:0]
STORE CONDITION
INSTRUCTIONS AS
THEY ARE READ FROM
THE SCRATCH PAD.
WATCH FOR
OCCURRENCE OF
CONDITION
INSTRUCTIONS
DURING
DOWNLOAD.
IF {NO TAGS} OR {CONDITION = 0}
EXECUTE INSTRUCTIONS
ELSE
IF {CONDITION IS TAGGED}
EXECUTE INSTRUCTIONS
ELSE
SKIP INSTRUCTIONS
ENDIF
5
IF {0x0E01, BITS[4:0] ≠ 0}
Figure 49. EEPROM Conditional Processing
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