參數(shù)資料
型號: HC805P18GRS
英文描述: 68HC805P18 Technical Data
中文描述: 68HC805P18技術(shù)數(shù)據(jù)
文件頁數(shù): 58/111頁
文件大?。?/td> 748K
代理商: HC805P18GRS
GENERAL RELEASE SPECIFICATION
MOTOROLA
9-2
ANALOG-TO-DIGITAL CONVERTER
MC68HC805P18
Rev. 1.0
8
2
3
4
5
6
7
8
9
10
11
12
13
14
A
16
17
18
19
20
9.2.3 Accuracy and Precision
The 8-bit conversion result is accurate to within
±
1 1/2 LSB, including quantization;
however, the accuracy of conversions is tested and guaranteed only with external
oscillator operation.
9.2.4 Conversion Process
The A/D reference inputs are applied to a precision digital-to-analog converter.
Control logic drives the D/A and the analog output is successively compared to the
selected analog input which was sampled at the beginning of the conversion cycle.
The conversion process is monotonic and has no missing codes.
9.3 Digital Section
The following paragraphs describe the operation and performance of digital
modules within the analog subsystem.
9.3.1 Conversion Times
Each input conversion requires 32 PH2 clock cycles, which must be at a frequency
equal to or greater than 1 MHz.
9.3.2 Internal versus External Oscillator
If the MCU PH2 clock frequency is less than 1 MHz (2 MHz external oscillator), the
internal RC oscillator (approximately 1.5 MHz) must be used for the A/D converter
clock. The internal RC clock is selected by setting the EERC bit in the EEPROG
register.
NOTE
The RC oscillator is shared with the EEPROM module. The RC
oscillator is disabled while the MCU is in stop mode.
F
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
n
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