參數(shù)資料
型號(hào): K5A3240YT
廠商: SAMSUNG SEMICONDUCTOR CO. LTD.
英文描述: Multi-Chip Package MEMORY 32M Bit (4Mx8/2Mx16) Dual Bank NOR Flash Memory / 4M(512Kx8/256Kx16) Full CMOS SRAM
中文描述: 多芯片封裝存儲(chǔ)器32兆位(4Mx8/2Mx16)雙銀行NOR閃存/分(512Kx8/256Kx16)全CMOS SRAM的
文件頁(yè)數(shù): 27/45頁(yè)
文件大?。?/td> 867K
代理商: K5A3240YT
MCP MEMORY
K5A3x40YT(B)C
Revision 0.0
November 2002
- 33 -
Preliminary
Alternate CEF Controlled Program Operations
Flash SWITCHING WAVEFORMS
NOTES:
1. DQ7 is the output of the complement of the data written to the device.
2. DOUT is the output of the data written to the device.
3. PA : Program Address, PD : Program Data
4. The illustration shows the last two cycles of the program command sequence.
OE
Address
WE
DATA
CEF
tAH
tAS
tDS
tDH
tCP
tOES
A0H
555H
PA
Status
DOUT
Data Polling
tCPH
tWS
tPGM
RY/BY
tBUSY
tRB
PD
tWC
Parameter
Symbol
70ns
80ns
Unit
Min
Max
Min
Max
Write Cycle Time
tWC
70
-
80
-
ns
Address Setup Time
tAS
0
-
0
-
ns
Address Hold Time
tAH
45
-
45
-
ns
Data Setup Time
tDS
35
-
35
-
ns
Data Hold Time
tDH
0
-
0
-
ns
OE Setup Time
tOES
0
-
0
-
ns
WE Setup Time
tWS
0
-
0
-
ns
WE Hold Time
tWH
0
-
0
-
ns
CEF Pulse Width
tCP
35
-
35
-
ns
CEF Pulse Width High
tCPH
25
-
25
-
ns
Programming Operation
Word
tPGM
14(typ.)
s
Byte
9(typ.)
s
Accelerated Programming Operation
Word
tACCPGM
9(typ.)
s
Byte
7(typ.)
s
Program/Erase Valide to RY/BY Delay
tBUSY
90
-
90
-
ns
Recovery Time from RY/BY
tRB
0
-
0
-
ns
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