參數(shù)資料
型號: K5A3240YT
廠商: SAMSUNG SEMICONDUCTOR CO. LTD.
英文描述: Multi-Chip Package MEMORY 32M Bit (4Mx8/2Mx16) Dual Bank NOR Flash Memory / 4M(512Kx8/256Kx16) Full CMOS SRAM
中文描述: 多芯片封裝存儲器32兆位(4Mx8/2Mx16)雙銀行NOR閃存/分(512Kx8/256Kx16)全CMOS SRAM的
文件頁數(shù): 32/45頁
文件大小: 867K
代理商: K5A3240YT
MCP MEMORY
K5A3x40YT(B)C
Revision 0.0
November 2002
- 38 -
Preliminary
Toggle Bit During Internal Routine Operation
Flash SWITCHING WAVEFORMS
tDH
CEF
Address*
OE
DQ6/DQ2
WE
RY/BY
Data In
tAHT
tASO
tAS
tCEPH
tOEH2
tOEPH
Status
Data
tOE
Status
Data
Status
Data
Array Data Out
NOTE: Address for the write operation must include a bank address (A19~A20) where the data is written.
DQ6
WE
DQ2
Enter
Embedded
Erasing
Erase
Suspend
Enter Erase
Suspend Program
Erase
Suspend
Program
Erase
Resume
Erase
Erase Suspend
Read
Erase
Complete
Erase Suspend
Read
NOTE: DQ2 is read from the erase-suspended block.
Toggle
DQ2 and DQ6
with OE or CEF
Parameter
Symbol
70ns
80ns
Unit
Min
Max
Min
Max
Output Enable Access Time
tOE
-
25
-
25
ns
OE Hold Time
tOEH2
10
-
10
-
ns
Address Hold Time
tAHT
0
-
0
-
ns
Address Setup
tASO
55
-
55
-
ns
Address Setup Time
tAS
0
-
0
-
ns
Data Hold Time
tDH
0
-
0
-
ns
CEF High during toggle bit polling
tCEPH
20
-
20
-
ns
OE High during toggle bit polling
tOEPH
20
-
20
-
ns
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