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參數(shù)資料
| 型號： | LXT972A |
| 廠商： | Intel Corp. |
| 英文描述： | 3.3V Dual-Speed Fast Ethernet Transceiver Datasheet |
| 中文描述： | 3.3雙速快速以太網(wǎng)收發(fā)器數(shù)據(jù)表 |
| 文件頁數(shù)： | 19/70頁 |
| 文件大?。?/td> | 833K |
| 代理商： | LXT972A |
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3.3V Dual-Speed Fast Ethernet Transceiver Datasheet
—
LXT972A
Datasheet
19
MDIO Frame Structure
The physical interface consists of a data line (MDIO) and clock line (MDC). The frame structure is
shown in
Figure 3
and
Figure 4
(read and write). MDIO Interface timing is shown in
Table 32 on
page 53
.
3.2.3.2
MII Interrupts
The LXT972A provides a single interrupt pin (MDINT). Interrupt logic is shown in
Figure 5
. The
LXT972A also provides two dedicated interrupt registers. Register 18 provides interrupt enable
and mask functions and Register 19 provides interrupt status. Setting bit 18.1 = 1, enables the
device to request interrupt via the MDINT pin. An active Low on this pin indicates a status change
on the LXT972A. Interrupts may be caused by four conditions:
Auto-negotiation complete
Speed status change
Duplex status change
Link status change
3.2.3.3
Hardware Control Interface
The LXT972A provides a Hardware Control Interface for applications where the MDIO is not
desired. The Hardware Control Interface uses the three LED driver pins to set device configuration.
Refer to
Section 3.4.5,
“
Hardware Configuration Settings
”
on page 23
for additional details.
Figure 3. Management Interface Read Frame Structure
Figure 4. Management Interface Write Frame Structure
MDC
MDIO
(Read)
High Z
32 "1"s
0
1
1
0
Preamble
ST
Op Code
PHY Address
Turn
Around
Z
0
A4
A3
A0
R4
R3
R0
Register Address
D15
D14
D1
Data
Write
Read
D15
D14
D1
D0
Idle
MDC
MDIO
(Write)
32 "1"s
0
1
0
1
Preamble
ST
Op Code
PHY Address
Turn
Around
1
0
A4
A3
A0
R4
R3
R0
Register Address
D15
D14
D1
D0
Data
Idle
Idle
Write
相關PDF資料 |
PDF描述 |
|---|---|
| LXT972ALC | 3.3V Dual-Speed Fast Ethernet Transceiver Datasheet |
| LXT972M | Single-Port 10/100 Mbps PHY Transceiver |
| LXT9763 | Fast Ethernet 10/100 Hex Transceiver with Full MII |
| LXT9763HC | LAN TRANSCEIVER|HEX|QFP|208PIN|PLASTIC |
| LXT9784 | Transceiver Hardware Integrity Function Overview |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| LXT972ALC | 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:3.3V Dual-Speed Fast Ethernet Transceiver Datasheet |
| LXT972LCHFB8 | 制造商:LEVEL_ONE 功能描述: |
| LXT972M | 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:Single-Port 10/100 Mbps PHY Transceiver |
| LXT973QC | 制造商:Intel 功能描述:LAN Transceiver, Dual, 100 Pin, Plastic, QFP |
| LXT974 | 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:Fast Ethernet 10/100 Quad Transceivers |
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