參數(shù)資料
型號(hào): LXT972A
廠商: Intel Corp.
英文描述: 3.3V Dual-Speed Fast Ethernet Transceiver Datasheet
中文描述: 3.3雙速快速以太網(wǎng)收發(fā)器數(shù)據(jù)表
文件頁(yè)數(shù): 46/70頁(yè)
文件大?。?/td> 833K
代理商: LXT972A
LXT972A
3.3V Dual-Speed Fast Ethernet Transceiver Datasheet
46
Datasheet
Table 22. 100BASE-TX Transceiver Characteristics
Parameter
Sym
Min
Typ
1
Max
Units
Test Conditions
Peak differential output voltage
V
P
0.95
1.05
V
Note 2
Signal amplitude symmetry
Vss
98
102
%
Note 2
Signal rise/fall time
T
RF
3.0
5.0
ns
Note 2
Rise/fall time symmetry
T
RFS
0.5
ns
Note 2
Duty cycle distortion
D
CD
35
50
65
%
Offset from 16ns pulse width at
50% of pulse peak
Overshoot/Undershoot
V
OS
5
%
Jitter (measured differentially)
1.4
ns
1. Typical values are at 25
°
C and are for design aid only; not guaranteed and not subject to production testing.
2. Measured at the line side of the transformer, line replaced by 100
(+/-1%) resistor.
Table 23. 10BASE-T Transceiver Characteristics
Parameter
Sym
Min
Typ
Max
Units
Test Conditions
Transmitter
Peak differential output voltage
V
OP
2.2
2.5
2.8
V
With transformer, line
replaced by 100
resistor
Transition timing jitter added by the
MAU and PLS sections
-
0
2
11
ns
After line model
specified by IEEE 802.3
for 10BASE-T MAU
Receiver
Receive Input Impedance
Z
IN
-
-
22
k
Differential Squelch Threshold
V
DS
300
420
585
mV
Table 24. 10BASE-T Link Integrity Timing Characteristics
Parameter
Sym
Min
Typ
Max
Units
Test Conditions
Time Link Loss Receive
T
LL
50
150
ms
Link Pulse
T
LP
2
7
Link Pulses
Link Min Receive Timer
T
LR
M
IN
2
7
ms
Link Max Receive Timer
T
LR
M
AX
50
150
ms
Link Transmit Period
Tlt
8
24
ms
Link Pulse Width
Tlpw
60
150
ns
1. Typical values are at 25
°
C and are for design aid only; not guaranteed and not subject to production testing.
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