
LXT972A
—
3.3V Dual-Speed Fast Ethernet Transceiver Datasheet
66
Datasheet
Table 48. Interrupt Enable Register (Address 18)
Bit
Name
Description
Type
1
Default
18.15:9
Reserved
Write as 0; ignore on read.
R/W
N/A
18.8
Reserved
Write as 0; ignore on read.
R/W
0
18.7
ANMSK
Mask for Auto Negotiate Complete
1 = Enable event to cause interrupt.
0 = Do not allow event to cause interrupt.
R/W
0
18.6
SPEEDMSK
Mask for Speed Interrupt
1 = Enable event to cause interrupt.
0 = Do not allow event to cause interrupt.
R/W
0
18.5
DUPLEXMSK
Mask for Duplex Interrupt
1 = Enable event to cause interrupt.
0 = Do not allow event to cause interrupt.
R/W
0
18.4
LINKMSK
Mask for Link Status Interrupt
1 = Enable event to cause interrupt.
0 = Do not allow event to cause interrupt.
R/W
0
18.3
Reserved
Write as 0, ignore on read.
R/W
0
18.2
Reserved
Write as 0, ignore on read.
R/W
0
18.1
INTEN
1 = Enable interrupts.
0 = Disable interrupts.
R/W
0
18.0
TINT
1 = Force interrupt on MDINT.
0 = Normal operation.
R/W
0
1. R/W = Read /Write
Table 49. Interrupt Status Register (Address 19, Hex 13)
Bit
Name
Description
Type
1
Default
19.15:9
Reserved
Ignore
RO
N/A
19.8
Reserved
Ignore
RO
0
19.7
ANDONE
Auto Negotiation Status
1 = Auto Negotiation has completed.
0 = Auto Negotiation has not completed.
RO/SC
N/A
19.6
SPEEDCHG
Speed Change Status
1 = A Speed Change has occurred since last reading this register.
0 = A Speed Change has not occurred since last reading this register.
RO/SC
0
19.5
DUPLEXCHG
Duplex Change Status
1 = A Duplex Change has occurred since last reading this register.
0 = A Duplex Change has not occurred since last reading this register.
RO/SC
0
19.4
LINKCHG
Link Status Change Status
1 = A Link Change has occurred since last reading this register.
0 = A Link Change has not occurred since last reading this register.
RO/SC
0
19.3
Reserved
Ignore
RO
0
1. R/W = Read/Write, SC = Self Clearing.