參數(shù)資料
型號(hào): LXT972A
廠商: Intel Corp.
英文描述: 3.3V Dual-Speed Fast Ethernet Transceiver Datasheet
中文描述: 3.3雙速快速以太網(wǎng)收發(fā)器數(shù)據(jù)表
文件頁數(shù): 30/70頁
文件大?。?/td> 833K
代理商: LXT972A
LXT972A
3.3V Dual-Speed Fast Ethernet Transceiver Datasheet
30
Datasheet
As shown in
Figure 13 on page 29
, the MAC starts each transmission with a preamble pattern. As
soon as the LXT972A detects the start of preamble, it transmits a Start-of-Stream Delimiter (SSD,
symbols J and K) to the network. It then encodes and transmits the rest of the packet, including the
balance of the preamble, the SFD, packet data, and CRC.
Once the packet ends, the LXT972A transmits the End-of Stream-Delimiter (ESD, symbols T and
R) and then returns to transmitting Idle symbols. 4B/5B coding is shown in
Table 10 on page 33
.
Figure 15
shows normal reception with no errors. When the LXT972A receives invalid symbols
from the line, it asserts RX_ER as shown in
Figure 16
.
Figure 15. 100BASE-TX Reception with no Errors
Figure 16. 100BASE-TX Reception with Invalid Symbol
RX_CLK
RX_DV
RXD<3:0>
RX_ER
preamble
SFD SFD
DA
DA
DA
DA
CRC
CRC
CRC
CRC
RX_CLK
RX_DV
RXD<3:0>
RX_ER
preamble
SFD SFD
DA
DA
XX
XX
XX
XX
XX
XX
XX
XX
XX
XX
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
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