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參數(shù)資料
| 型號(hào)： | MC68322FT16 |
| 廠商： | FREESCALE SEMICONDUCTOR INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 16-BIT, 16.667 MHz, RISC PROCESSOR, PQFP160 |
| 封裝： | PLASTIC, QFP-160 |
| 文件頁數(shù)： | 12/283頁 |
| 文件大?。?/td> | 1602K |
| 代理商： | MC68322FT16 |
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Parallel Port Interface
9-10
MC68322 USER’S MANUAL
MOTOROLA
If ECP without RLE is enabled (MODE = 10
2), a channel address and run-length count
always generates a command received interrupt event. The PPI does not perform any
decompression. BUSY remains low until the PPIR’s DATA field is read by the core. No data
received interrupt event is posted and no PDMA request is generated for the command byte.
If ECP with RLE is enabled (MODE = 11
2) and a channel address is received, a command
received interrupt event is posted. BUSY remains low until the PPIR’s DATA field is read by
the core. If the PPI detects a run-length count, RLE decompression will occur on the next
data byte that is received. No command or data received interrupt events are posted and no
PDMA request is generated for the run-length command byte.
9.2.2.2 RLE DECOMPRESSION. When ECP with RLE handshaking is enabled,
run-length counts are detected and automatically loaded into an internal counter. The PPI
then sets the PPCR’s RLD bit. A run-length count of zero is interpreted as a replication factor
of one and a run-length count of 127 is interpreted as a factor of 128. BUSY is driven high
when the run-length value is loaded into the counter and lowered when STROBE returns
high. The PPI then waits for the next data byte.
When the next data byte arrives, BUSY remains low for the entire decompression period. In
the MC68322, depending on internal bus utilization, a replication factor of 128 could result
in BUSY remaining low for 1 to 2 ms while STROBE remains low. As decompression occurs,
the PPI generates PDMA requests and data received interrupts events in exactly the same
manner as when it receives uncompressed data. When the run-length counter decrements
to zero, the last PPIR DATA field read results in the BUSY being driven high and then low
following the rising edge of STROBE. The RLD bit is also cleared at this time. After a
run-length command is received the next byte usually is a data byte. If the next byte is also
a run-length, then this new run-length is used. If the next byte is a channel address, then a
command received interrupt event is posted and the PPI state machine continues waiting
for the next data byte.
If the PPCR’s MODE field is changed after the run-length command was received, but
before the data byte was received, then RLD remains set. When ECP with RLE is enabled
again, decompression will begin when the data byte is received. If MODE is changed while
decompression is occurring (RLD is set and the data byte was received), the decompression
continues until completion. If decompression must be immediately aborted, RST should be
issued in the PPCR.
The PPCR’s FLL bit is set when the run-length is received and immediately cleared when
the run-length is loaded into the counter. FLL is set again when the data byte is received and
cleared when the run-length counter reaches zero and the last data byte is decompressed.
9.2.3 Disabling Hardware Handshaking
When hardware handshaking is disabled (MODE = 00
2), the software is responsible for
controlling the PPI. However, the PPIR’s DATA field continues to latch parallel port data on
the leading edge of STROBE, even with all hardware handshaking disabled. Also, host
control signal inputs are always synchronized to CLK1 to prevent metastable events from
reaching the internal logic of the MC68322. This does not include PD7–PD0 since they are
guaranteed to be stable when STROBE is low.
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Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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