Index
Index-8
MC68322 USER’S MANUAL
MOTOROLA
print engine interface, 10-1
print engine video controller
data transfer complete, 10-9
soft-reset, 10-16
print engine video controller (PVC)
soft-reset 10-7
starting 10-9
print engine video controller interface signals, 2-8
print engine video controller, 10-1
printer communication interface signals, 2-8
printer communication protocol, 10-8
printer control block
new print operation indication, 10-6
printer languages, 1-8
printer video controller
soft-reset register 5-14
printer video controller (PVC)
burst cycles 7-1
DMA accesses 7-1
priviledge violation exception 5-11
privileged instructions listed 5-11
program flow control graphic orders, 13-3
PVC reset interrupt event, 10-15
PVC, 10-1
PVCCR, 10-3
PVCIR, 10-6
R
RDR, 11-2
reallocating DMA resource 8-6
refresh cycle
CAS before RAS, timing 7-5
EC000 Core accesses 7-6
timing 7-6
timing parameters, 7-5
refresh cycle, 7-6
refresh cycles
WE during 7-6
registers
alternate pin, D-2
chip-select DMA timing, 6-3
chip-select recovery, 6-4
chip-select related, 6-1
chip-select, 6-1
DMA speed, 8-4
DRAM (see DRAM registers)
DRAM control, 7-5
DRAM, 7-1
external interrupt, 5-4
external interrupt, described 5-4
GDMA configuration
described 8-2
GDMA configuration, 8-2
GDMA control, 8-3
internal status, 5-1
interrupt event, 4-6, 5-1
interrupt level, 5-1
location overlap priority 6-3
mask, C-3
memory-mapped, C-1
module soft-reset (MSRR), described 5-14
parallel port control, 9-4
parallel port interface, 9-2
PDMA configuration, 8-2
PPI interrupt event, 9-6
printer communication interrupt event, 10-8
printer communication, 10-2
printer control block, 10-5
PVC control, 10-3
PVC interrupt event, 10-6
RGP diagnostic, 11-2
RGP interrupt event, 11-2
RGP start, 11-2
software interrupt event
described 5-3
software interrupt event, 4-12, 5-3
status (see EC000 Core)
status, 4-8, 5-7
test, C-3
timer interrupt event, 5-5
timer, 5-5
rendering direction, programmed 10-5
RESET
asserting, 9-14
reset exeption, 5-9
reset instruction
executing, 4-8
reset operation
PVC during, 10-11
PVC, 10-15
reset operation, 4-8
resolution 10-15
resolution, 10-1
RGP, 10-9, 11-1
RICSC graphics processor (RGP)
burst cycles 7-1
RIER, 11-2
RISC graphics processor
DMA accesses, 7-1
errors during display list execution, 11-4
operation, 11-3
registers
RGP diagnostic, 11-2
RGP interrupt event, 11-2
RGP start, 11-2
registers, 11-2
soft-reset register 5-14
RISC graphics processor, 11-1
ROM mode, 7-2
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Freescale Semiconductor, Inc.
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