Index
Index-6
MC68322 USER’S MANUAL
MOTOROLA
I
ICE interface signals, A-1
ICE, A-1
illegal address
DMA access to 8-6
illegal address interrupt, 4-12
illegal and unimplemented instructions, 5-10
illegal instruction exception 5-11
in-circuit emulation interface
adaptor board design, A-4
adaptor board schematics, A-6
pin assignment, A-16
signals, A-1
in-circuit emulation interface, A-1
initialization graphic orders, 13-1
instruction set summary, 3-4, 3-6
instructions
illegal and unimplemented, 5-11
privileged listed 5-11
privileged, 5-11
tracing 5-12
unimplemented emulation 5-11
interrupt acknowledge bus cycle, 4-6
interrupt events
command sent, 10-11
RGP error, 12-15
interrupt handling, 5-1
interrupt, generating, 4-6
interrupts
DTACK, during illegal memory address
access 5-3
error during RGP operation, 11-3
events
band underrun 10-7
command recieve, 9-7
command sent status, 10-8
data received, 9-7
DMA illegal address 8-6
EC000 Core request 9-8
illegal address, PVC, 10-7
page end 10-7
page/band begin, 10-7
PDMA request, 9-8
RGP busy, 11-3
RGP error 11-4
status receive, 10-8
video underrun 10-7
external, 5-4
externally initiated 5-4
hardware, 5-1
illegal memory address access, 5-3
internal, 5-1
IRQx, during external interrupts 5-4
priority level
external, 5-4
registers
external described 5-4
software event described 5-3
software
clearing, 5-3
setting priority level, 5-3
software, 5-3
interrupts, 5-1
J
JUMP, 13-46
L
languages
printer, 1-8
latching, 9-13
location constraints, 12-15
M
mask register, C-3
mastership, assuming, 4-9
MC68322
alternate pin functions, D-1
applications, B-1
bus arbitration, 4-9
bus operation, 4-1
configuration, B-1
core, 3-1
DMA interface, 8-1
DRAM controller, 7-1
electrical and thermal characteristics, 14-1
explanation, 1-8
features, 1-2
graphic operations, 12-1
graphic orders, 13-1
in-circuit emulation interface, A-1
interrupt and exception handling, 5-1
introduction, 1-1
memory-mapped register summary, C-1
parallel port interface, 9-1
print engine interface, 10-1
RISC graphics processor, 11-1
signal descriptions, 2-1
system integration module, 6-1
MC68322 bus
cycles
CSx during DMA generated, 8-4
DMA incrementing address 8-2
DMA read and write cycles 8-7
MC68322 reset, differences during, 10-16
mechanicals, 15-1
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Freescale Semiconductor, Inc.
For More Information On This Product,
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