Signal Descriptions
2-8
MC68322 USER’S MANUAL
MOTOROLA
2.6 DMA INTERFACE
The following signals control the DMA interface. They are used to transfer data from the
MC68322 bus to DRAM or vice versa.
2.7 PRINTER COMMUNICATION INTERFACE
The following signals communicate with the print engine. Due to various interfaces with
different print engines, some signals may not be needed.
2.8 PRINT ENGINE VIDEO CONTROLLER INTERFACE
The print engine video controller (PVC) interface consists of five signals designed to
interface directly to most laser print engines and input/output polarities are programmable.
The following signals are used to transfer data from the MC68322 to the print engine.
PIN NAME
DESCRIPTION
DREQ
Data Request—This input signal, whose polarity is programmable, is asserted by a peripheral device to request
a transfer between the internal core bus and DRAM. The assertion of the DREQ signal starts a DMA operation.
DACK
Data Acknowledge—This active-low output signal indicates that a DMA transfer is complete.
PIN NAME
DESCRIPTION
CBSY
Command Busy—This output only signal indicates that a command byte is being sent to the print engine.
SBSY
Status Busy—This input only signal indicates that a status is ready to be received from the print engine.
CCLK
Command Clock—This bidirectional signal is used to clock command and status data between the MC68322
and the print engine. It is not a free running clock and remains inactive until CBSY or SBSY is asserted. The
print engine or the MC68322 can supply CCLK. The direction of this pin is programmable and engine dependent.
CMD/STS
Command/Status—This bidirectional signal is provided because some print engines require command and
status on the same line. It is used to exchange command and status information between the print engine and
the MC68322. The direction of this pin is programmable and engine dependent.
STS
Status—This input signal is used by the print engine to supply data to the MC68322. Data sent through this
signal is synchronous with the CCLK.
PIN NAME
DESCRIPTION
VCLK
Video Shift Clock—This input signal is a free-running clock that is used to drive the video transfer. The print
engine or an onboard oscillator can supply VCLK.
FSYNC
Frame Synchronize—This input only signal indicates frame synchronization. The print engine asserts the
FSYNC signal to begin a page. The active polarity of this signal is programmable.
LSYNC
Line Synchronize—This input signal indicates that the print engine is ready to accept data for
the next scanline. The active polarity of this signal is programmable.
PRINT
Print Request—This output signal indicates that the MC68322 is ready to begin printing. The
assertion of this signal initiates the printing process. The active polarity of this pin is
programmable.
VIDEO
Video Data—This output signal provides the serial video data to the printer. The default
polarity is low for active video and high for inactive video. The VIDEO output driver can sink
and source 24 mA. The active polarity of this signal is programmable.
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Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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