參數(shù)資料
型號(hào)： MC72000
廠商： 飛思卡爾半導(dǎo)體(中國)有限公司
英文描述： Integrated Bluetooth Radio
中文描述： 集成藍(lán)牙無線
文件頁數(shù)： 110/156頁
文件大小： 1782K
代理商： MC72000
110
MC72000 Advance Information Data Sheet
Go to: www.freescale.com
MOTOROLA
Hardware Functional Description
Figure 73. Normal Mode Timing—Gated Clock
Table 55. Gated Clock Operations
Step
FIFOs Disabled
(See Figure 73)
FIFOs Enabled
(No Figure Available
1
Clocks occur on STCK to clock data out on the
STXD pin and in on the SRXD pin
Clocks stop on STCK and no data is
transferred
Note: The idle time is a multiple of word times,
when the clock is generated internally.
All other timing of transmit and receive
functions continue as in Normal mode
Receive flag status update
The last bit of the receive data is captured on
the last falling clock edge before the clock is
gated off.
The receive interrupt does not occur at the
same time as the transmit interrupt, if both are
enabled.
If the RIE bit is set, enabling receive interrupts,
then:
(Other options for processing the data is either
polling or DMA transfers.)
Receive overrun (setting the ROE bit of the
SCSR register) is prevented by
1
:
2
3
4
The RDR bit is set
The RFF bit is set if the level of data in
the RXFIFO rises above the watermark
level
5
Receive interrupt
occurs when RDR set
Receive interrupt occurs when RFF set
6
Data is read from the
SRX before the RXSR
tries to write new
transmit data at the
next frame sync
Data is read from the SRX before the
RXSR tries to provide more data to a full
RXFIFO (it can take several frame times
to fill the RXFIFO)
GATED_STCK
STX register
TDE status bit/interrupt
TXSR register
STXD
SRXD
RXSR register
SRX register
RDR status bit/interrupt
Valid
Indefinite transition depends on SW interrupt processing
Invalid
1
2
7
4
8
5
9
F
For More Information On This Product,
n
.
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