參數資料
型號： MC72000
廠商： 飛思卡爾半導體(中國)有限公司
英文描述： Integrated Bluetooth Radio
中文描述： 集成藍牙無線
文件頁數： 93/156頁
文件大?。?/td> 1782K
代理商： MC72000
MOTOROLA
MC72000
Advance Information Data Sheet
Go to: www.freescale.com
93
The TFE bit is set by power-on reset and when SSI is disabled.
Figure 60. Frame Sync Timing Options
7.4.5.2.9
SSI Control Register 2 (SCR2)
The SSI Control Register 2 (SCR2) is one of three 16-bit control registers that select the operating mode for
the SSI.
Interrupt enable bits for the receive and transmit sections are provided in this control register. Before they
can function, the chip level interrupt priority register (IPR) must be set to enable SSI interrupts.
Power-on reset clears all SCR2 bits. However, SSI reset does not affect the SCR2 bits. The SCR2 bits are
described in the following sections.
TS 0
TS 1
TS n
a) Frame Sync Timing Options
b) TFS Status Flag Operation
c) RFS Status Flag Operation
STCK, SRCK
Bit-Length FS
early Bit-Length FS
Word-Length FS
early Word-Length FS
Time slots
STX register
TFS
STXD pin
SRXD pin
RFS
SRX register
Valid
Indefinite transition depends on SW interrupt processing
Invalid
F
Freescale Semiconductor, Inc.
For More Information On This Product,
n
.
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