- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄359147 > MC72000 (飛思卡爾半導(dǎo)體(中國)有限公司) Integrated Bluetooth Radio PDF資料下載
參數(shù)資料
| 型號： | MC72000 |
| 廠商： | 飛思卡爾半導(dǎo)體(中國)有限公司 |
| 英文描述： | Integrated Bluetooth Radio |
| 中文描述： | 集成藍牙無線 |
| 文件頁數(shù)： | 95/156頁 |
| 文件大小： | 1782K |
| 代理商： | MC72000 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁第81頁第82頁第83頁第84頁第85頁第86頁第87頁第88頁第89頁第90頁第91頁第92頁第93頁第94頁當(dāng)前第95頁第96頁第97頁第98頁第99頁第100頁第101頁第102頁第103頁第104頁第105頁第106頁第107頁第108頁第109頁第110頁第111頁第112頁第113頁第114頁第115頁第116頁第117頁第118頁第119頁第120頁第121頁第122頁第123頁第124頁第125頁第126頁第127頁第128頁第129頁第130頁第131頁第132頁第133頁第134頁第135頁第136頁第137頁第138頁第139頁第140頁第141頁第142頁第143頁第144頁第145頁第146頁第147頁第148頁第149頁第150頁第151頁第152頁第153頁第154頁第155頁第156頁
MOTOROLA
MC72000
Advance Information Data Sheet
Go to: www.freescale.com
95
If the transmit FIFO is enabled:
1 = An interrupt is generated when the TFE flag (in the SCSR) is set
When this interrupt occurs, up to eight values can be written to the STX, depending on the level
of the TXFIFO watermark.
0 = No interrupt is generated
The TDE bit always indicates the STX register empty condition, even when the transmitter is disabled
by the transmit enable (TE) bit in the SCR2. Writing data to the STX or STSR clears the TDE bit, thus
clearing the interrupt. Two transmit data interrupts with separate interrupt vectors are available: transmit
data with exception status and transmit data without exceptions. Table 43 shows the conditions under
which these interrupts are generated and lists the interrupt vectors.
Table 43. SSI Transmit Data Interrupts
1
RE—Receive Enable
This control bit enables the receive portion of the SSI.
1 = Receive portion of the SSI is enabled and receive data will be processed starting with the next
receive frame sync
0 = Receiver is disabled by inhibiting data transfer into the SRX
If data is being received when this bit is cleared, the rest of the word is not shifted in nor is it
transferred to the SRX register. If the RE bit is re-enabled during a time slot before the second
to last bit, then the word will be received.
It is recommended to clear this bit when clearing SSIEN.
TE—Transmit Enable
This control bit enables the transfer of the contents of the STX register to the transmit shift register
(TXSR) and also enables the internal gated clock.
1 = On the next frame boundary, the transmit portion of the SSI is enabled.
With internally generated clocks, the frame boundary will occur within a word time. If the TE
bit is cleared and then set again during the same transmitted word, the data continues to be
transmitted. If the TE bit is set again during a different time slot, data is not transmitted until
the next frame boundary.
0 = Transmitter continues to send the data currently in the TXSR and then disables the transmitter.
The serial output enable signal is disabled and any data present in the STX register is not
transmitted. In other words, data can be written to the STX register with the TE bit cleared, and
the TDE bit is cleared but data is not transferred to the TXSR.
The normal transmit enable sequence is to write data to the STX register or to the STSR before setting
the TE bit. The normal transmit disable sequence is to clear the TE bit and the TIE bit after the TDE bit
is set.
When an internal gated clock is being used, the gated clock runs during valid time slots if the TE bit is
set. If the TE bit is cleared, the transmitter continues to send the data currently in the TXSR until it is
empty. Then the clock stops. When the TE bit is set again, the gated clock starts immediately and runs
during any valid time slots.
This bit should be cleared when clearing SSIEN.
1.See
Table 37
for a complete list of interrupts.
Interrupt
TIE
Selection Control
TUE
TFEN = 0
TFEN = 1
Transmit Data with Exception Status
Transmit Data (without exception)
1
1
TDE = 1
TDE = 1
TFE = 1
TFE = 1
1
0
F
Freescale Semiconductor, Inc.
For More Information On This Product,
n
.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| MC7445ARX1000LF | RISC Microprocessor Hardware Specifications |
| MC7445ARX1000LG | RISC Microprocessor Hardware Specifications |
| MC7447A | PowerPC microprocessor |
| MC7447AHX1000NB | PowerPC microprocessor |
| MC7447AHX1167NB | PowerPC microprocessor |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MC7220C-100M RI-BLK | 制造商:Farnell / Pro-Power 功能描述:CABLE DEF 7-2-20C 20CORE 100M 制造商:pro-power 功能描述:CABLE, DEF 7-2-20C, 20CORE, 100M 制造商:pro-power 功能描述:CABLE, DEF 7-2-20C, 20CORE, 100M; Reel Length (Imperial):328ft; Reel Length (Metric):100m; No. of Conductors:20; Voltage Rating:440V; No. of Strands x Strand Size:7 x 0.2mm; Conductor Area CSA:0.22mm2; Jacket Colour:Black; Jacket ;RoHS Compliant: Yes |
| MC7220C-100M RI-BLK | 制造商:Farnell / Pro-Power 功能描述:CABLE DEF 7-2-20C 20 CORE 100M |
| MC7220C-25M RI-BLK | 制造商:Farnell / Pro-Power 功能描述:CABLE DEF 7-2-20C 20CORE 25M 制造商:pro-power 功能描述:CABLE, DEF 7-2-20C, 20CORE, 25M |
| MC7220C-25M RI-BLK | 制造商:Farnell / Pro-Power 功能描述:CABLE DEF 7-2-20C 20 CORE 25M |
| MC7225C-25M RI-BLK | 制造商:Farnell / Pro-Power 功能描述:CABLE DEF 7-2-25C 25CORE 25M 制造商:pro-power 功能描述:MULTICORE, 25, 7/0.2MM, 25M, BLACK 制造商:pro-power 功能描述:CABLE, DEF 7-2-25C, 25CORE, 25M 制造商:PRIVATE LABEL 功能描述:CABLE, DEF 7-2-25C, 25CORE, 25M, Reel Length (Imperial):82ft, Reel Length (Metri |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。