xvi
MPC8240 Integrated Processor User's Manual
MOTOROLA
CONTENTS
Paragraph
Number
Title
Page
Number
10.3.4.2
10.3.4.2.1
10.3.4.2.2
10.3.4.2.3
10.3.4.2.4
10.3.4.2.5
10.3.4.2.6
10.3.4.2.7
10.3.4.2.8
10.3.4.2.9
10.3.4.2.10
10.3.4.2.11
10.3.4.2.12
Processor-Accessible I
2
O Registers.........................................................10-11
Inbound Message Interrupt Status Register (IMISR)...........................10-11
Inbound Message Interrupt Mask Register (IMIMR)..........................10-13
Inbound Free_FIFO Head Pointer Register (IFHPR)...........................10-14
Inbound Free_FIFO Tail Pointer Register (IFTPR).............................10-15
Inbound Post_FIFO Head Pointer Register(IPHPR)............................10-15
Inbound Post_FIFO Tail Pointer Register(IPTPR)..............................10-16
Outbound Free_FIFO Head Pointer Register (OFHPR)......................10-17
Outbound Free_FIFO Tail Pointer Register(OFTPR)..........................10-17
Outbound Post_FIFO Head Pointer Register(OPHPR) .......................10-18
Outbound Post_FIFO Tail Pointer Register (OPTPR).........................10-18
Messaging Unit Control Register (MUCR) .........................................10-19
Queue Base Address Register (QBAR)................................................10-20
Chapter 11
I
2
C Interface
11.1
11.1.1
11.1.2
11.1.3
11.2
11.2.1
11.2.2
11.2.3
11.2.4
11.2.5
11.2.6
11.2.7
11.2.8
11.2.9
11.3
11.3.1
11.3.2
11.3.3
11.3.4
11.3.5
11.4
11.4.1
11.4.2
11.4.3
11.4.4
I
2
C Interface Overview ......................................................................................11-1
I
2
C Unit Features............................................................................................11-2
I
2
C Interface Signal Summary .......................................................................11-2
I
2
C Block Diagram.........................................................................................11-3
I
2
C Protocol........................................................................................................11-3
START Condition ..........................................................................................11-4
Slave Address Transmission...........................................................................11-4
Data Transfer..................................................................................................11-5
Repeated START Condition...........................................................................11-5
STOP Condition .............................................................................................11-5
Arbitration Procedure.....................................................................................11-5
Clock Synchronization ...................................................................................11-6
Handshaking...................................................................................................11-6
Clock Stretching.............................................................................................11-7
Programming Model...........................................................................................11-7
I
2
C Address Register (I2CADR)....................................................................11-7
I
2
C Frequency Divider Register (I2CFDR) ...................................................11-8
2
C Control Register (I2CCR)......................................................................11-10
I
2
C Status Register (I2CSR).........................................................................11-12
I
2
C Data Register (I2CDR)..........................................................................11-13
Programming Guidelines..................................................................................11-14
Initialization Sequence .................................................................................11-14
Generation of START ..................................................................................11-15
Post-Transfer Software Response.................................................................11-15
Generation of STOP.....................................................................................11-16