MOTOROLA
Contents
v
CONTENTS
Paragraph
Number
Title
Page
Number
Chapter 1
Overview
1.1
1.1.1
1.1.2
1.2
1.3
1.4
1.4.1
1.4.2
1.4.3
1.4.4
1.4.4.1
1.4.4.2
1.4.4.3
1.4.4.4
1.4.5
1.4.6
1.4.6.1
1.4.6.2
1.4.6.3
1.4.7
1.4.8
1.4.9
1.4.10
1.5
1.5.1
1.5.2
1.6
1.6.1
1.6.2
1.6.3
1.6.4
1.6.5
MPC8240 Integrated Processor Overview...........................................................1-1
MPC8240 Integrated Processor Features.........................................................1-3
MPC8240 Integrated Processor Applications..................................................1-5
Processor Core Overview ....................................................................................1-7
Peripheral Logic Bus..........................................................................................1-10
Peripheral Logic Overview................................................................................1-10
Peripheral Logic Features..............................................................................1-11
Peripheral Logic Functional Units.................................................................1-12
Memory System Interface..............................................................................1-13
Peripheral Component Interface (PCI)..........................................................1-14
PCI Bus Arbitration Unit...........................................................................1-14
Address Maps and Translation ..................................................................1-14
Byte Ordering ............................................................................................1-14
PCI Agent Capability.................................................................................1-15
DMA Controller.............................................................................................1-15
Message Unit (MU).......................................................................................1-15
Doorbell Registers.....................................................................................1-15
Inbound and Outbound Message Registers ...............................................1-15
Intelligent Input/Output Controller (I
2
O)..................................................1-16
Inter-Integrated Circuit (I
2
C) Controller .......................................................1-16
Embedded Programmable Interrupt Controller (EPIC).................................1-16
Integrated PCI Bus and SDRAM Clock Generation .....................................1-17
Bus Ratios......................................................................................................1-17
Power Management ...........................................................................................1-17
Programmable Processor Power Management Modes ..................................1-18
Peripheral Logic Power Management Modes................................................1-18
Debug Features..................................................................................................1-19
Memory Attribute and PCI Attribute Signals................................................1-19
Memory Debug Address................................................................................1-19
Memory Interface Valid (MIV).....................................................................1-20
Error Injection/Capture on Data Path ............................................................1-20
IEEE 1149.1 (JTAG)/Test Interface..............................................................1-20