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參數(shù)資料
| 型號： | PSD813FH |
| 英文描述： | Field Programmble Microcontroller Peripherals With Flash Memory(帶閃存的現(xiàn)場可編程微控制器) |
| 中文描述： | 場可編程微控制器外圍設(shè)備與快閃記憶體（帶閃存的現(xiàn)場可編程微控制器） |
| 文件頁數(shù)： | 24/83頁 |
| 文件大?。?/td> | 369K |
| 代理商： | PSD813FH |
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PSD813FN/FH
Prelimnary
24
Microcontroller Interface Examples
Figures 10 and 11 show examples of the basic connections between the PSD813FN/FH
and some popular microcontrollers. The PSD813FN/FH control input pins are labeled as the
microcontroller function for which they are configured. The MCU interface is specified using
the PSDsoft tools. The PC2 pin should be grounded if Vstby is not used.
80C31
Figure 10 shows the interface to the 80C31 which has an 8-bit multiplexed address/data
bus. The lower address byte is multiplexed with the data bus. The microcontroller RD and
WR signals may be used for accessing internal SRAM and I/O Ports while the PSEN signal
is used to read the EPROM. The ALE input (Port D PD0) latches the address. Refer to the
Memory Section for additional 80C31 operating modes.
68HC11
Figure 11 shows an interface to an 68HC11 where the PSD813FH is configured in 8-bit
multiplexed mode with E and R/W settings. The ECSPLD can generate the READ and
WR signals for external on board devices. The CNTL2 pin is not used and can be used
as a PLD input.
80C251
The Intel 80C251 microcontroller features a user-configurable bus interface with two
possible bus configurations as shown in Table 13.
Bus Interface
(cont.)
Configuration
80C251
Read/Write
Pins
Connecting to
PSD813FN/FH
Pins
Page Mode
WR
RD
PSEN
CNTL0
CNTL1
CNTL2
Non-Page Mode, 80C31 compatible
A
[
7:0
]
multiplex with D
[
7:0
}
1
2
WR
PSEN only
CNTL0
CNTL1
Non-Page Mode
A
[
7:0
]
multiplex with D
[
7:0
}
Table 13. 80C251 Configurations
Configuration 1 is 80C31 compatible. The bus interface to the PSD813FH is identical to that
shown in Figure 10. There is only one read input (PSEN) connected to the CNTL1 pin on
the PSD813FH. The A16 connection to the PA0 pin allows for a larger address input to the
PSD813FH.
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