參數(shù)資料
型號(hào): PSD813FH
英文描述: Field Programmble Microcontroller Peripherals With Flash Memory(帶閃存的現(xiàn)場(chǎng)可編程微控制器)
中文描述: 場(chǎng)可編程微控制器外圍設(shè)備與快閃記憶體(帶閃存的現(xiàn)場(chǎng)可編程微控制器)
文件頁數(shù): 50/83頁
文件大?。?/td> 369K
代理商: PSD813FH
PSD813FN/FH
Prelimnary
50
Port Configuration
Reset
Power Down Mode
MCU I/O
Input
Unchanged
PLD Output
Active
Depends on inputs to the PLD
Address Out
Tri-stated
Not defined
Data Port
Tri-stated
Tri-stated
Peripheral I/O
Tri-stated
Tri-stated
Register
Reset
Power Down Mode
PMMR0 & 1
Cleared (power up reset)
Unchanged (warm reset)
Unchanged
Micro
Cells Flip-Flop
Unchanged*
Unchanged*
All other registers
Cleared to “0”
Unchanged
Table 30. Chip Status During Reset and Power Down Mode
Oher Features
(cont.)
*
The Micro
Cell Flip-Flop can be cleared or set by the reset input or the PDN (Power Down) signal, depending on
the .re and .pr equations that are defined in the PSDabel file.
Security Protection
The PSD813FN/FH has a programmable security bit which acts as a duplication barrier.
When the bit is set, the contents of the Flash and Boot EPROM, non-volatile configuration
bits, and the PLDs cannot be read by device programmers.
The security bit is set through the PSDsoft Software and is embedded in the compiled
output file. The security bit is UV erasable and a secured windowed part can be erased
and re-programmed.
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