參數(shù)資料
型號: W925E240
英文描述: Telephone Controller
中文描述: 電話控制器
文件頁數(shù): 10/66頁
文件大小: 930K
代理商: W925E240
W925E/C240
8-bit CID Microcontroller
Revision : A6
-10-
Release Date : 2002/7/2
6.1
Memory Organization
The W925E/C240 separates the memory into two separate sections, the Program Memory and
the Data Memory. The Program Memory is used to store the instruction op-codes and look-up
table data, while the Data Memory is used to store data or for memory mapped devices.
Program Memory:
The Program Memory on the W925E/C240 can be up to 256K bytes that are divided into 4 pages,
each page has the size of 64K bytes. The upper 128K bytes are used to store the op-codes and
the whole 256K can be used to store look-up table data. Because the op-code is 64K
addressable, a PG bit in PAGE register decides which ROM page between page0 and page1 is
enabled and the ALU fetches the op-code from the selected ROM page. If PG=0, ALU fetches the
op-code from page0. If PG=1, ALU fetches the op-code from page1.
When MOVC instruction is
executed, ALU fetches the look-up table data according the indication of LT1 and LT0 bits. The
value of LT1 and LT0 indicates which ROM page is active for look-up table instruction.
64K
Page0
64K
Page3
64K
Page2
64K
Page1
3FFFF
0FFFF
10000
1FFFF
20000
2FFFF
30000
00000
PG=0
PG=1
LT1,0
=00
LT1,0
=01
LT1,0
=10
LT1,0
=11
Figure 6-1 Program Memory Map
Data Memory:
The W925E/C240 contains on-chip 8K MOVX RAM of Data Memory, which can only be accessed
by MOVX instructions from the address 0000H to 1FFFH. In addition, the W925E/C240 has 256
bytes of on-chip scratchpad RAM. This can be accessed either by direct addressing or by indirect
addressing. There are also Special Function Registers (SFRs), which can only be accessed by
direct addressing. Since the scratchpad RAM is only 256 bytes, it can be used only when data
contents are small. In the event that larger data contents are present, the only one selection is
on-chip MOVX RAM. The on-chip MOVX RAM can only be accessed by a MOVX instruction.
However, the on-chip RAM has the fastest access times. The memory map is shown Figure 6-2
and Figure 6-3 shows the scratched-pad RAM/register addressing.
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