參數(shù)資料
型號(hào): W925E240
英文描述: Telephone Controller
中文描述: 電話控制器
文件頁數(shù): 9/66頁
文件大小: 930K
代理商: W925E240
W925E/C240
8-bit CID Microcontroller
Revision : A6
-9-
Release Date : 2002/7/2
6
The W925E/C240 is an 8-bit micro-controller with CID function. The 8-bit micro-control has the
same instruction set as the 8051 family, with one addition: DEC DPTR (op-code A5H, the DPTR
is decreased by 1). In addition, the W925E/C240 contains on-chip 8K bytes MOVX RAM.
ROM:
There are 256K bytes EEPROM/MASK ROM. Only 128K bytes EEPROM/MASK ROM is used for
program code. The completely 256K bytes EEPROM/MASK ROM can be used for the look-up
table memory.
On-chip Data RAM:
The W925E/C240 has 8K normal RAM which address is from 0000H to 1FFFH. It only can be
accessed by MOVX instruction; this on-chip RAM is optional under software control. The on-chip
data RAM is not used for executable program memory. There is no conflict or overlap among the
256 bytes scratchpad RAM and the 8K Bytes MOVX RAM as they use different addressing
modes and separate instructions.
CID:
The CID functions include the FSK decoder, CAS detector, DTMF decoder and ring detector.
FSK modulator:
Support ITU-T V.23 and Bellcore 202 FSK transmit modulated signal.
DTMF modulator:
The W925E/C240 built-in dual tone multi-frequency generator.
I/O Ports:
The W925E/C240 has five 8-bit I/O ports giving a total of 40 lines. Port0 to Port3 can be used as
an 8-bit general I/O port with bit-addressable. The I/O mode of each port is controlled by PxIO
registers. Port1 to Port4 have internal pull high resistors enabled/disabled by PxH registers. Port0
is open-drain type in output mode.
Serial I/O port:
The serial port, through P4.0 (SCLK) and P4.1 (SDATA), is an 8-bit synchronous serial I/O
interface.
Timers:
The W925E/C240 has two 13/16-bit timers or 8 bits auto-reload timers. An independent watchdog
timer is used as a system monitor or as a very long time period timer. A divider can produce the
divider interrupt in every period of 0.5S or 0.25S.
Comparator:
The W925E/C240 has an internal comparator with one external analog signal input path VNEG
and an external path VPOS or a regulator voltage for the reference input REF1.
Interrupts:
The W925E/C240 provides eleven interrupt resources with two priority level, including 4 external
interrupt sources, 2 timer interrupts, 1 CID interrupt, 1 divider interrupt, 1 serial port interrupt, 1
comparator interrupt and 1 watchdog timer interrupt.
Power Management:
The W925E/C240 has IDLE and POWER DOWN modes of operation. In the IDLE mode, the
clock to the CPU core is stopped however the functions of the timers, divider, CID and interrupts
are active continuously. In the POWER DOWN mode, both of the system clock stop oscillating
and the chip operation is completely stopped. POWER DOWN mode is the state of the lowest
power consumption.
FUNCTIONAL DESCRIPTION
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