參數(shù)資料
型號(hào)： W925E240
英文描述： Telephone Controller
中文描述： 電話控制器
文件頁(yè)數(shù)： 25/66頁(yè)
文件大?。?/td> 930K
代理商： W925E240
W925E/C240
8-bit CID Microcontroller
Revision : A6
-25-
Release Date : 2002/7/2
guard timer is equal to the value of CASPT, the exist of the CAS tone is accepted.
ALGR changes to low state to stop and reset the counter.
CAS TONE ABSENT TIME REGISTER
(initial=0FH)
Bit:
Mnemonic: CASAT
7
6
5
4
3
2
1
0
CASAT7 CASAT6 CASAT5 CASAT4 CASAT3 CASAT2 CASAT1 CASAT0
The clock period of guard-time timer is 0.8582mS. The default alert tone absent time is 12.87mS.
CASAT7-0: The pre-set data register for counting CAS tone absent time. When CAS tone is
absent (ALGR high to low), the guard timer starts to up-count from 00H. As the
guard timer is equal to the value of CASAT, the finish of CAS tone is recognized.
ALGR changes to high state to stop and reset the counter.
Address: BFh
SERIAL PORT CONTROL
(initial=00H)
Bit:
7
6
-
5
4
3
2
1
0
SF1
REGON
REN1
SFQ
SEDG
CLKIO
SIO
Mnemonic: SCON1
Address: C0h
SF1: Serial port interrupt flag. When 8-bits data is transceived completely, SF1 is set by
hardware. SF1 is cleared when serial interrupt routine is executed or cleared by software.
REGON: Regulator on/off control. 0 to disable regulator, 1 to regulator.
REN1: Set REN1 from 0 to 1 to start the serial port to receive 8-bit serial data.
SFQ: SFQ=0 Serial clock output frequency is equal to f
OSC
/2
SFQ=1 Serial clock output frequency is equal to f
OSC
/256
SEDG: SEDG=0 Serial data latched at falling edge of clock, SCLK=Low initially.
SEDG=1 Serial data latched at rising edge of clock, SCLK=High initially.
CLKIO: CLKIO=0 P4.0(SCLK) work as output mode
CLKIO=1 P4.0(SCLK) work as input mode
SIO:
SIO=0 P4.0 & P4.1 work as normal I/O pin
SIO=1 P4.0 & P4.1 work as Serial port1 function
SERIAL DATA BUFFER
(initial=00H)
Read Only
Bit:
7
6
5
4
3
2
1
0
SBUF1.7 SBUF1.6 SBUF1.5 SBUF1.4 SBUF1.3 SBUF1.2 SBUF1.1 SBUF1.0
Mnemonic: SBUF1
Address: C1h
SBUF1.7-0: Serial data on the serial port 1 is read from or written to this location. It actually
consists of two separate internal 8-bit registers. One is the receive register, and the
other is the transmit buffer. Any read access gets data from the receive data buffer,
while write access is to the transmit data buffer.
REGULATOR VOLTAGE CONTROL REGISTER
(initial=00H)
Bit:
7
-
6
-
5
-
4
-
3
2
1
0
REGVC.3 REGVC.2 REGVC.1 REGVC.0
Mnemonic: REGVC
Address: C2h
REGVC.3-0: 4 bits to tune the regulator output voltage.
POWER MANAGEMENT REGISTER
(initial=XXX00001B)
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