參數(shù)資料
型號: W925E240
英文描述: Telephone Controller
中文描述: 電話控制器
文件頁數(shù): 40/66頁
文件大小: 930K
代理商: W925E240
W925E/C240
8-bit CID Microcontroller
Revision : A6
-40-
Release Date : 2002/7/2
WATCHDOG TIMER
The Watchdog timer is a free-running timer that can be programmed by the user to serve as a
system monitor, a time-base generator or an event timer. It is basically a set of dividers that
divides the system clock. The divider output is selectable and determines the time-out interval. In
the condition of the timer-out expiring, the WDT interrupt and WDT reset may be executed if the
corresponding enable control bits are set. The interrupt will occur if the individual interrupt enable
and the global enable are set. The interrupt and reset functions are independent of each other
and may be used separately or together depending on the users software.
12
WD1,WD0
00
01
10
11
Interrupt
Reset
Enable Watchdog timer reset
EWT(WDCON.1)
Reset Watchdog
RWT (WDCON.0)
1
13
15
16
18
19
21
Time-out
selector
WDIF
WTRF
512 clock
delay
EWDI(EIE.5)
Fosc
Fsub
WFS(WDCON.4)
Figure 6-7 Watchdog Timer
The Watchdog timer should first be restarted by using RWT. This ensures that the timer starts
from a known state. The RWT bit is used to restart the watchdog timer. This bit is self clearing,
i.e. after writing a 1 to this bit the software will automatically clear it. The watchdog timer will now
count clock cycles. The time-out interval is selected by the two bits WD1 and WD0 (CKCON.7
and CKCON.6). When the selected time-out occurs, the Watchdog interrupt flag WDIF
(WDCON.3) is set. After the time-out has occurred, the watchdog timer waits for an additional 512
clock cycles. The software must issue a RWT to reset the watchdog before the 512 clocks have
elapsed. If the Watchdog Reset EWT (WDCON.1) is enabled, then 512 clocks after the time-out,
if there is no RWT, a system reset due to Watchdog timer will occur. This will last for two machine
cycles, and the Watchdog timer reset flag WTRF (WDCON.2) will be set. This indicates to the
software that the watchdog was the cause of the reset.
When used as a simple timer, the reset and interrupt functions are disabled. The timer will set the
WDIF flag each time the timer completes the selected time interval. The WDIF flag is polled to
detect a time-out and the RWT allows software to restart the timer. The Watchdog timer can also
be used as a very long timer. The interrupt feature is enabled in this case. Every time the time-out
occurs an interrupt will occur if the global interrupt enable EA is set.
Table 6 Time-out values for the Watchdog timer
WD1
WD0
Watchdog
Interval
Clocks
3.579545 MHz
0
0
2
12
0
1
2
15
1
0
2
18
1
1
2
21
Number of
Fosc=
Fosc=
32768 Hz
0.125 S
1 S
8 S
Reset of
Clocks
4608
33280
262656
4096
32786
262144
1.14 mS
9.15 mS
73.23 mS
2097152
585.87 mS
64 S
2097664
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