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參數(shù)資料
| 型號： | XPC750EC |
| 英文描述： | XPC750P/D XPC750P RISC Microprocessor Hardware Specifications |
| 中文描述： | XPC750P /數(shù)XPC750P RISC微處理器硬件規(guī)格 |
| 文件頁數(shù)： | 11/52頁 |
| 文件大?。?/td> | 1274K |
| 代理商： | XPC750EC |
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MOTOROLA
MPC755 RISC Microprocessor Hardware Specifications
11
Electrical and Thermal Characteristics
1.4.2
AC Electrical Characteristics
This section provides the AC electrical characteristics for the MPC755. After fabrication, functional parts
are sorted by maximum processor core frequency as shown in Section 1.4.2.1, “Clock AC Specifications,”
and tested for conformance to the AC specifications for that frequency. The processor core frequency is
determined by the bus (SYSCLK) frequency and the settings of the PLL_CFG[0:3] signals. Parts are sold
by maximum processor core frequency; see Section 1.10, “Ordering Information.”
1.4.2.1
Clock AC Specifications
Table 8 provides the clock AC timing specifications as defined in Figure 3.
Nap Mode
1.0
Sleep Mode
470
Maximum
1.0
1.0
1.0
W
1, 2
Maximum
460
470
470
mW
1, 2
Sleep Mode (PLL and DLL Disabled)
340
430
Typical
Maximum
Notes:
1. These values apply for all valid processor bus and L2 bus ratios. The values do not include I/O supply power
(OV
DD
and L2OV
DD
) or PLL/DLL supply power (AV
DD
and L2AV
DD
). OV
DD
and L2OV
DD
power is system
dependent, but is typically <10% of V
DD
power. Worst case power consumption for AV
DD
= 15 mW and L2AV
DD
= 15 mW.
2. Maximum power is measured at nominal V
DD
(see Table 4) while running an entirely cache-resident, contrived
sequence of instructions which keep the execution units, with or without AltiVec, maximally busy.
3. Typical power is an average value measured at the nominal recommended V
DD
(see Table 3) and 65
°
C in a
system while running a typical code sequence.
340
430
340
430
340
430
mW
mW
1, 3
1, 2
Table 8. Clock AC Timing Specifications
At recommended operating conditions (see Table 3)
Characteristic
Symbol
Maximum Processor Core Frequency
Unit
Notes
300 MHz
350 MHz
400 MHz
450 MHz
Min
Max
Min
Max
Min
Max
Min
Max
Processor frequency
f
core
200
300
200
350
200
400
200
450
MHz
1
VCO frequency
f
VCO
400
600
400
700
400
800
400
900
MHz
1
SYSCLK frequency
f
SYSCLK
25
100
25
100
25
100
25
100
MHz
1
SYSCLK cycle time
t
SYSCLK
10
40
10
40
10
40
10
40
ns
SYSCLK rise and fall
time
t
KR
, t
KF
—
2.0
—
2.0
—
2.0
—
2.0
ns
2
t
KR
, t
KF
—
1.4
—
1.4
—
1.4
—
1.4
ns
2
SYSCLK duty cycle
measured at OV
DD
/2
t
KHKL
/
t
SYSCLK
40
60
40
60
40
60
40
60
%
3
Table 7. Power Consumption for MPC755 (continued)
Processor (CPU) Frequency
350 MHz
Unit
Notes
300 MHz
400 MHz
450 MHz
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