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參數(shù)資料
| 型號： | ADUuC7027BSTZ62-RL |
| 廠商： | Analog Devices, Inc. |
| 英文描述： | Precision Analog Microcontroller 12-bit Analog I/O, ARM7TDMI MCU |
| 中文描述： | 精密模擬微控制器的12位模擬I / O，ARM7TDMI的微控制器 |
| 文件頁數(shù)： | 22/92頁 |
| 文件大?。?/td> | 850K |
| 代理商： | ADUUC7027BSTZ62-RL |
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ADuC7019/20/21/22/24/25/26/27
Pin No.
36
37
Rev. A | Page 22 of 92
Mnemonic
XCLKI
P3.6/PWM
TRIP
/PLAI[14]
Description
Input to the Crystal Oscillator Inverter and Input to the Internal Clock Generator Circuits.
General-Purpose Input and Output Port 3.6/PWM Safety Cut Off/Programmable Logic Array
Input Element 14.
General-Purpose Input and Output Port 3.7/PWM Synchronization Input Output/Programmable
Logic Array Input Element 15.
Serial Port Multiplexed. General-Purpose Input and Output Port 1.7/UART, SPI/Programmable
Logic Array Output Element 0.
Serial Port Multiplexed. General-Purpose Input and Output Port 1.6/UART, SPI/Programmable
Logic Array Input Element 6.
Ground for GPIO. Typically connected to DGND.
3.3 V Supply for GPIO and Input of the On-Chip Voltage Regulator.
General-Purpose Input and Output Port 4.0/Programmable Logic Array Output Element 8.
General-Purpose Input and Output Port 4.1/Programmable Logic Array Output Element 9.
Serial Port Multiplexed. General-Purpose Input and Output Port 1.5/UART, SPI/Programmable
Logic Array Input Element 5/External Interrupt Request 3, Active High.
Serial Port Multiplexed. General-Purpose Input and Output Port 1.4/UART, SPI/Programmable
Logic Array Input Element 4/External Interrupt Request 2, Active High.
Serial Port Multiplexed. General-Purpose Input and Output Port 1.3/UART, I2C1/Programmable
Logic Array Input Element 3.
Serial Port Multiplexed. General-Purpose Input and Output Port 1.2/UART, I2C1/Programmable
Logic Array Input Element 2.
Serial Port Multiplexed. General-Purpose Input and Output Port 1.1/UART, I2C0/Programmable
Logic Array Input Element 1.
Serial Port Multiplexed. General-Purpose Input and Output Port 1.0/Timer1 Input/UART,
I
2
C0/Programmable Logic Array Input Element 0.
General-Purpose Input and Output Port 4.2/Programmable Logic Array Output Element 10.
General-Purpose Input and Output Port 4.3/Programmable Logic Array Output Element 11.
General-Purpose Input and Output Port 4.4/Programmable Logic Array Output Element 12.
General-Purpose Input and Output Port 4.5/Programmable Logic Array Output Element 13.
2.5 V Internal Voltage Reference. Must be connected to a 0.47 μF capacitor when using the
internal reference.
External Voltage Reference for the DACs. Range: DACGND to DACV
DD
.
Ground for the DAC. Typically connected to AGND.
Analog Ground. Ground reference point for the analog circuitry.
3.3 V Analog Power.
3.3 V Power Supply for the DACs. Typically connected to AV
DD
.
Single-Ended or Differential Analog Input 0.
Single-Ended or Differential Analog Input 1.
Single-Ended or Differential Analog Input 2/Comparator Positive Input.
Single-Ended or Differential Analog Input 3/Comparator Negative Input.
38
P3.7/PWM
SYNC
/PLAI[15]
39
P1.7/SPM7/PLAO[0]
40
P1.6/SPM6/PLAI[6]
41
42
43
44
45
IOGND
IOV
DD
P4.0/PLAO[8]
P4.1/PLAO[9]
P1.5/SPM5/PLAI[5]/IRQ3
46
P1.4/SPM4/PLAI[4]/IRQ2
47
P1.3/SPM3/PLAI[3]
48
P1.2/SPM2/PLAI[2]
49
P1.1/SPM1/PLAI[1]
50
P1.0/T1/SPM0/PLAI[0]
51
52
53
54
55
P4.2/PLAO[10]
P4.3/PLAO[11]
P4.4/PLAO[12]
P4.5/PLAO[13]
V
REF
56
57
58
59
60
61
62
63
64
DAC
REF
DACGND
AGND
AV
DD
DACV
DD
ADC0
ADC1
ADC2/CMP0
ADC3/CMP1
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