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| 型號： | ADUuC7027BSTZ62-RL |
| 廠商： | Analog Devices, Inc. |
| 英文描述： | Precision Analog Microcontroller 12-bit Analog I/O, ARM7TDMI MCU |
| 中文描述： | 精密模擬微控制器的12位模擬I / O，ARM7TDMI的微控制器 |
| 文件頁數(shù)： | 42/92頁 |
| 文件大?。?/td> | 850K |
| 代理商： | ADUUC7027BSTZ62-RL |
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ADuC7019/20/21/22/24/25/26/27
DRIVING THE ANALOG INPUTS
Internal or external reference can be used for the ADC. In
differential mode of operation, there are restrictions on
common-mode input signal (V
CM
), which is dependent on the
reference value and supply voltage used to ensure that the signal
remains within the supply rails. Table 17 gives some calculated
V
CM
min and V
CM
max for some conditions.
Table 17. V
CM
Ranges
AV
DD
V
REF
V
CM
Min
V
CM
Max
2.5 V
1.25 V
2.05 V
2.048 V
1.024 V
2.276 V
1.25 V
0.75 V
2.55 V
2.5 V
1.25 V
1.75 V
2.048 V
1.024 V
1.976 V
1.25 V
0.75 V
2.25 V
CALIBRATION
By default, the factory set values written to the ADC offset
(ADCOF) and gain coefficient registers (ADCGN) yield
optimum performance in terms of end-point errors and
linearity for standalone operation of the part. (See the
Specifications section.) If system calibration is required, it is
possible to modify the default offset and gain coefficients to
improve end-point errors, but note that any modification to the
factory set ADCOF and ADCGN values can degrade ADC
linearity performance.
Rev. A | Page 42 of 92
Signal Peak-to-Peak
2.5 V
2.048 V
1.25 V
2.5 V
2.048 V
1.25 V
3.3 V
3.0 V
For system offset error correction, the ADC channel input stage
must be tied to AGND. A continuous software ADC conversion
loop must be implemented by modifying the value in ADCOF
until the ADC result (ADCDAT) reads code 0 to 1. Offset error
correction is done digitally and has a resolution of 0.25 LSB and
a range of ±3.125% of V
REF
.
For system gain error correction, the ADC channel input stage
must be tied to V
REF
. A continuous software ADC conversion
loop must be implemented to modify the value in ADCOF until
the ADC result (ADCDAT) reads code 4094 to 4095. Similar to
the offset calibration, the gain calibration resolution is 0.25 LSB
with a range of ±3% of V
REF
.
TEMPERATURE SENSOR
The ADuC7019/7020/7021/7022/7024/7025/7026/7027 provide
voltage output from on-chip band gap references proportional
to absolute temperature. This voltage output can also be routed
through the front-end ADC multiplexer (effectively an
additional ADC channel input) facilitating an internal
temperature sensor channel, measuring die temperature to an
accuracy of
±
3
°
C.
BAND GAP REFERENCE
Each ADuC7019/7020/7021/7022/7024/7025/7026/7027
provides an on-chip band gap reference of 2.5 V, which can be
used for the ADC and DAC. This internal reference also
appears on the V
REF
pin. When using the internal reference, a
0.47
μ
F capacitor must be connected from the external V
REF
pin
to AGND to ensure stability and fast response during ADC
conversions. This reference can also be connected to an external
pin (V
REF
) and used as a reference for other circuits in the
system. An external buffer is required because of the low drive
capability of the V
REF
output. A programmable option also
allows an external reference input on the V
REF
pin.
REFCON Register
Name
REFCON
Address
0xFFFF048C
Default Value
0x00
Access
R/W
The band gap reference interface consists of an 8-bit MMR
REFCON described in Table 18.
Table 18. REFCON MMR Bit Designations
Bit
Description
7:2
Reserved.
1
Internal Reference Power-Down Enable.
Set
by user to
place the internal reference in power-down mode and
use as an external reference.
Cleared
by user to place
the internal reference in normal mode and use it for
ADC conversions.
0
Internal Reference Output Enable.
Set
by user to
connect the internal 2.5 V reference to the V
REF
pin. The
reference can be used for external component but
needs to be buffered.
Cleared
by user to disconnect
the reference from the V
REF
pin.
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