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| 型號： | ADUuC7027BSTZ62-RL |
| 廠商： | Analog Devices, Inc. |
| 英文描述： | Precision Analog Microcontroller 12-bit Analog I/O, ARM7TDMI MCU |
| 中文描述： | 精密模擬微控制器的12位模擬I / O，ARM7TDMI的微控制器 |
| 文件頁數(shù)： | 37/92頁 |
| 文件大?。?/td> | 850K |
| 代理商： | ADUUC7027BSTZ62-RL |
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ADuC7019/20/21/22/24/25/26/27
ADC CIRCUIT OVERVIEW
The analog-to-digital converter (ADC) incorporates a fast,
multichannel, 12-bit ADC. It can operate from 2.7 V to 3.6 V
supplies and is capable of providing a throughput of up to 1 MSPS
when the clock source is 41.78 MHz. This block provides the user
with a multichannel multiplexer, differential track-and-hold, on-
chip reference, and ADC.
Rev. A | Page 37 of 92
The ADC consists of a 12-bit successive approximation
converter based around two capacitor DACs. Depending on the
input signal configuration, the ADC can operate in one of three
different modes:
Fully differential mode, for small and balanced signals
Single-ended mode, for any single-ended signals
Pseudo differential mode, for any single-ended signals,
taking advantage of the common-mode rejection offered
by the pseudo differential input
The converter accepts an analog input range of 0 to V
REF
when
operating in single-ended mode or pseudo differential mode. In
fully differential mode, the input signal must be balanced
around a common-mode voltage V
CM
, in the range 0 V to AV
DD
,
and with a maximum amplitude of 2 V
REF
(see Figure 36).
0
AV
DD
V
CM
V
CM
V
CM
0
2V
REF
2V
REF
2V
REF
Figure 36. Examples of Balanced Signals in Fully Differential Mode
A high precision, low drift, and factory calibrated 2.5 V
reference is provided on-chip. An external reference can also be
connected as described later in the Band
G
ap Reference section.
Single or continuous conversion modes can be initiated in the
software. An external CONV
START
pin, an output generated from
the on-chip PLA, or a Timer0 or Timer1 overflow can also be
used to generate a repetitive trigger for ADC conversions.
A voltage output from an on-chip band gap reference
proportional to absolute temperature can also be routed
through the front-end ADC multiplexer, effectively an
additional ADC channel input. This facilitates an internal
temperature sensor channel, which measures die temperature to
an accuracy of
±
3
°
C.
TRANSFER FUNCTION
Pseudo Differential and Single-Ended Modes
In pseudo differential or single-ended modes, the input range is
0 V to V
REF
. The output coding is straight binary in pseudo
differential and single-ended modes with
1 LSB = FS/4096, or
2.5 V/4096 = 0.61 mV, or
610
μ
V when V
REF
= 2.5 V
The ideal code transitions occur midway between successive
integer LSB values (that is, 1/2 LSB, 3/2 LSB, 5/2 LSB, … ,
FS 3/2 LSB). The ideal input/output transfer characteristic
is shown in Figure 37.
0
O
VOLTAGE INPUT
1111 1111 1111
1111 1111 1110
1111 1111 1101
1111 1111 1100
0000 0000 0011
1LSB
0V
+FS – 1LSB
0000 0000 0010
0000 0000 0001
0000 0000 0000
1LSB =
FS
4096
Figure 37. ADC Transfer Function in Pseudo Differential Mode
or Single-Ended Mode
Fully Differential Mode
The amplitude of the differential signal is the difference
between the signals applied to the V
IN+
and V
IN–
pins (that is,
V
IN+
– V
IN–
). The maximum amplitude of the differential signal
is therefore –V
REF
to +V
REF
p-p (that is, 2 × V
REF
). This is
regardless of the common mode (CM). The common mode is
the average of the two signals, for example, (V
IN+
+ V
IN–
)/2, and
is therefore the voltage that the two inputs are centered on. This
results in the span of each input being CM
±
V
REF
/2. This
voltage has to be set up externally and its range varies with V
REF
(see the Driving the Analog Inputs section).
The output coding is twos complement in fully differential
mode with 1 LSB = 2 V
REF
/4096 or 2 × 2.5 V/4096 = 1.22 mV
when V
REF
= 2.5 V. The designed code transitions occur midway
between successive integer LSB values (that is, 1/2 LSB, 3/2 LSB,
5/2 LSB, … , FS – 3/2 LSB). The ideal input/output transfer
characteristic is shown in Figure 38.
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