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參數(shù)資料
| 型號： | ADUuC7027BSTZ62-RL |
| 廠商： | Analog Devices, Inc. |
| 英文描述： | Precision Analog Microcontroller 12-bit Analog I/O, ARM7TDMI MCU |
| 中文描述： | 精密模擬微控制器的12位模擬I / O，ARM7TDMI的微控制器 |
| 文件頁數(shù)： | 8/92頁 |
| 文件大?。?/td> | 850K |
| 代理商： | ADUUC7027BSTZ62-RL |
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ADuC7019/20/21/22/24/25/26/27
Parameter
INTERNAL OSCILLATOR
MCU CLOCK RATE
From 32 kHz Internal Oscillator
From 32 kHz External Crystal
Using an External Clock
START-UP TIME
At Power-On
From Pause/Nap Mode
From Sleep Mode
From Stop Mode
PROGRAMMABLE LOGIC ARRAY (PLA)
Pin Propagation Delay
Element Propagation Delay
POWER REQUIREMENTS
13, 14
Power Supply Voltage Range
AV
DD
AGND and IOV
DD
IOGND
Analog Power Supply Currents
AV
DD
Current
DACV
DD
Current
15
Digital Power Supply Current
IOV
DD
Current in Normal Mode
IOV
DD
Current in Pause Mode
IOV
DD
Current in Sleep Mode
Additional Power Supply Currents
ADC
DAC
1
All ADC channel specifications are guaranteed during normal MicroConverter core operation.
2
Apply to all ADC input channels.
3
Measured using the factory set default values in ADCOF and ADCGN.
4
Not production tested but supported by design and/or characterization data on production release.
5
Measured using the factory set default values in ADCOF and ADCGN using an external AD845 op amp as an input buffer stage as shown in Figure 47. Based on
external ADC system components, the user may need to execute a system calibration to remove external endpoint errors and achieve these specifications (see the
Calibration section).
6
The input signal can be centered on any dc common-mode voltage (V
CM
) as long as this value is within the ADC voltage input range specified.
7
When using an external reference input pin, the internal reference must be disabled by setting the LSB in the REFCON memory mapped register to 0.
8
DAC linearity is calculated using a reduced code range of 100 to 3995.
9
DAC gain error is calculated using a reduced code range of 100 to internal 2.5 V V
REF
.
10
Endurance is qualified as per JEDEC Standard 22 method A117 and measured at 40°C, +25°C, +85°C, and +125°C.
11
Retention lifetime equivalent at junction temperature (T
J
) = 85°C as per JEDEC Standard 22 method A117. Retention lifetime derates with junction temperature.
12
Test carried out with a maximum of eight I/O set to a low output level.
13
Power supply current consumption is measured in normal, pause, and sleep modes under the following conditions: Normal Mode: 3.6 V supply, Pause Mode: 3.6 V
supply, Sleep Mode: 3.6 V supply.
14
IOV
DD
power supply current decreases typically by 2 mA during a flash/EE erase cycle.
15
On the ADuC7019/20/21/22, this current must be added to AV
DD
current.
Rev. A | Page 8 of 92
Min
0.05
0.05
2.7
Typ
32.768
326
41.78
130
24
3.06
1.58
1.7
12
2.5
200
400
3
7
11
40
25
250
600
2
0.7
700
Max
±3
44
41.78
3.6
25
10
15
45
30
400
1000
Unit
kHz
%
kHz
MHz
MHz
MHz
ms
ns
μs
ms
ms
ns
ns
V
μA
μA
μA
mA
mA
mA
mA
μA
μA
mA
mA
μA
Test Conditions/Comments
CD = 7
CD = 0
T
A
= 85°C
T
A
= 125°C
Core clock = 41.78 MHz
CD = 0
CD = 7
From input pin to output pin
ADC in idle mode; all parts except ADuC7019
ADC in idle mode; ADuC7019 only
Code executing from Flash/EE
CD = 7
CD = 3
CD = 0 (41.78 MHz clock)
CD = 0 (41.78 MHz clock)
T
A
= 85°C
T
A
= 125°C
@ 1 MSPS
@ 62.5 kSPS
per DAC
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