參數(shù)資料
型號： ADUuC7027BSTZ62-RL
廠商： Analog Devices, Inc.
英文描述： Precision Analog Microcontroller 12-bit Analog I/O, ARM7TDMI MCU
中文描述： 精密模擬微控制器的12位模擬I / O，ARM7TDMI的微控制器
文件頁數(shù)： 61/92頁
文件大?。?/td> 850K
代理商： ADUUC7027BSTZ62-RL
ADuC7019/20/21/22/24/25/26/27
GPxCON are the port x control registers, which select the
function of each pin of port x. as described in Table 40.
Table 40. GPxCON MMR Bit Descriptions
Bit
Description
31:30
Reserved
29:28
Select Function of Px.7 Pin
27:26
Reserved
25:24
Select Function of Px.6 Pin
23:22
Reserved
21:20
Select Function of Px.5 Pin
19:18
Reserved
17:16
Select Function of Px.4 Pin
15:14
Reserved
13:12
Select Function of Px.3 Pin
11:10
Reserved
9:8
Select Function of Px.2 Pin
7:6
Reserved
5:4
Select Function of Px.1 Pin
3:2
Reserved
1:0
Select Function of Px.0 Pin
GPxPAR Registers
Name
Address
GP0PAR
0xFFFFF42C
GP1PAR
0xFFFFF43C
GP3PAR
0xFFFFF45C
Rev. A | Page 61 of 92
Default Value
0x20000000
0x00000000
0x00222222
Access
R/W
R/W
R/W
GPxPAR program the parameters for Port 0, Port 1, and Port 3.
Note that the GPxDAT MMR must always be written after
changing the GPxPAR MMR.
Table 41. GPxPAR MMR Bit Descriptions
Bit
Description
31:29
Reserved
28
Pull-Up Disable Px.7
27:25
Reserved
24
Pull-Up Disable Px.6
23:21
Reserved
20
Pull-Up Disable Px.5
19:17
Reserved
16
Pull-Up Disable Px.4
15:13
Reserved
12
Pull-Up Disable Px.3
11:9
Reserved
8
Pull-Up Disable Px.2
7:5
Reserved
4
Pull-Up Disable Px.1
3:1
Reserved
0
Pull-Up Disable Px.0
GPxDAT Registers
Name
GP0DAT
GP1DAT
GP2DAT
GP3DAT
GP4DAT
Address
0xFFFFF420
0xFFFFF430
0xFFFFF440
0xFFFFF450
0xFFFFF460
Default Value
0x000000XX
0x000000XX
0x000000XX
0x000000XX
0x000000XX
Access
R/W
R/W
R/W
R/W
R/W
GPxDAT are port x configuration and data registers. They
configure the direction of the GPIO pins of port x, set the
output value for the pins configured as output, and store the
input value of the pins configured as input.
Table 42. GPxDAT MMR Bit Descriptions
Bit
Description
31:24
Direction of the Data.
Set
to 1 by user to configure
the GPIO pin as an output.
Cleared
to 0 by user to
configure the GPIO pin as an input.
23:16
Port x Data Output.
15:8
Reflect the State of Port x Pins at Reset (read only).
7:0
Port x Data Input (read only).
GPxSET Registers
Name
Address
GP0SET
0xFFFFF424
GP1SET
0xFFFFF434
GP2SET
0xFFFFF444
GP3SET
0xFFFFF454
GP4SET
0xFFFFF464
Default Value
0x000000XX
0x000000XX
0x000000XX
0x000000XX
0x000000XX
Access
W
W
W
W
W
GPxSET are data set port x registers.
Table 43. GPxSET MMR Bit Descriptions
Bit
Description
31:24
Reserved.
23:16
Data Port x Set Bit.
Set
to 1 by user to set bit on port
x; also sets the corresponding bit in the GPxDAT
MMR.
Cleared
to 0 by user; does not affect the data out.
15:0
Reserved.
GPxCLR Registers
Name
Address
GP0CLR
0xFFFFF428
GP1CLR
0xFFFFF438
GP2CLR
0xFFFFF448
GP3CLR
0xFFFFF458
GP4CLR
0xFFFFF468
Default Value
0x000000XX
0x000000XX
0x000000XX
0x000000XX
0x000000XX
Access
W
W
W
W
W
GPxCLR are data clear port x registers.
Table 44. GPxCLR MMR Bit Descriptions
Bit
Description
31:24
Reserved.
23:16
Data Port x Clear Bit.
Set
to 1 by user to clear bit on
port x; also clears the corresponding bit in the
GPxDAT MMR.
Cleared
to 0 by user; does not affect
the data out.
15:0
Reserved.
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