參數(shù)資料
型號(hào)： GT-48004A
廠商： Galileo Technology Services, LLC
英文描述： Four Port Switched Fast Ethernet Controller(四端口、交換式快速以太網(wǎng)控制器)
中文描述： 四端口交換式快速以太網(wǎng)控制器（四端口，交換式快速以太網(wǎng)控制器）
文件頁(yè)數(shù)： 24/106頁(yè)
文件大小： 953K
代理商： GT-48004A
GT-48004A Four Port Switched Fast Ethernet Controller
N:\Marketing\Docs\Archive\48004A\DATASHEET\Rev 1.0\484ads10.fm
Revision 1.0
24
7.
Packet Forwarding
The following sections describe the procedures for forwarding packets in the following situations:
A unicast packet to a local port in the same GalNet device (Section 7.1)
A unicast packet between GalNet devices (Section 7.2)
A multicast packet to local ports in the same GalNet device (Section 7.3.1)
A multicast packet between GalNet devices in a system without a CPU (Section 7.3.2.1)
A multicast packet between GalNet devices in a system with a CPU (Section 7.3.2.2)
A packet destined for the CPU, multicast, or unicast packet from a GalNet device to the CPU (Section 7.4)
A unicast/multicast packet from the CPU to a GalNet device (Section 7.5)
7.1
Forwarding a Unicast Packet to a Local Port
The sequence for forwarding a unicast packet to a local port (port in the same GT-48004A) is as follows:
1.
The incoming packet is fed to the Rx FIFO (there is an 20x32-bit Rx FIFO per port) and is transferred to an empty
block in the Receive Buffer area of DRAM.
2.
In parallel, an address recognition cycle is performed for both the DA and the SA. The GT-48004A uses the DA’s
corresponding Port Number to queue the packet to the appropriate local port.
3.
At the end of an error-free packet transfer, packet information is written to the appropriate port’s transmit descriptor.
This information includes the Byte Count and the Receive Buffer Block Address which is pointed to by the Write
Pointer.
4.
The Write Pointer of the outgoing port’s transmit descriptor is incremented. The target GalNet device transmits
whenever the Write Pointer is not equal to the Read Pointer.
5.
At the end of the packet transmit process, the target GalNet device increments the Read Pointer and clears the
appropriate bit in the Empty List.
7.2
Forwarding a Unicast Packet to a Port in a Different GalNet Device or FEU
The sequence for forwarding a Unicast packet to a port in a different GalNet device located on the PCI bus or in a dif-
ferent Fast Ethernet Unit (FEU) on the same GT-48004A, is as follows:
1.
The incoming packet is fed to the Rx FIFO and is transferred to an empty block in the Receive Buffer area of
DRAM.
2.
In parallel, an address recognition cycle is performed for both the DA and the SA. The GT-48004A uses the DA’s
corresponding Port Number and Device Number to queue the packet to the appropriate GalNet device and port.
3.
At the end of an error-free packet transfer, packet information is written to the PCI’s transmit descriptor. This infor-
mation includes the byte count and Receive Buffer Block Address which is pointed to by the Write Pointer. When
the PCI’s transmit descriptor’s Write Pointer is not equal to the Read Pointer, the source GalNet device sends a
BUFFER_REQUEST message (Section 11.2.2) to the appropriate target GalNet device indicating that there is a
packet for transmission across the PCI bus.
4.
The target GalNet device receives this message and allocates a buffer in its DRAM. This target device then sends
a START_OF_PACKET message (Section 11.2.3) back to the source GT-48004A indicating it is ready to receive
the packet.
5.
The source GT-48004A transfers the packet with the PACKET_TRANSFER message (Section 11.2.4) using PCI
master operations in multiple eight 32-bit bursts. The packet is buffered in the Receive Buffer area of the target
device’s DRAM. After the entire packet has been transmitted, the source GT-48004A performs an additional write
transaction by sending the END_OF_PACKET message (Section ) indicating completion of the packet transfer.
This message contains the Byte Count, the target Port Number, the Rx Block address, and the Packet Type. The
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