![](http://datasheet.mmic.net.cn/110000/GT-48004A_datasheet_3491732/GT-48004A_9.png)
GT-48004A Four Port Switched Fast Ethernet Controller
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Revision 1.0
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erate document, available on our website.
1.7
Quality-of-Service/Priority Support
The GT-48004A includes the capability to prioritize traffic based on source or destination MAC address, or input port.
Two output priorities are supported. Priority support in the GT-48004A is described in detail in a seperate document,
available on our website.
1.8
Network Management Features
The GT-48004A provides comprehensive management capabilities enabling the switch OEM to implement a wide
range of network management features.
For OEMs offering RMON capability, the GT-48004A provides per-port statistics counters and PCI traffic counters. Also
included in the GT-48004A is a packet sampling capability that can be used to implement RMON using a low cost CPU.
Each port has the ability to take “snapshots” of packet data and counters at programmable intervals. These samples
are forwarded to the management CPU for processing. Source addresses of every errored packet are also sent to the
CPU allowing switch OEM to support error counters in RMON host and matrix groups.
Also included in the GT-48004A is hardware assistance for address aging and bridge spanning tree algorithms.
1.9
DRAM Interface
Each GT-48004A device in the system requires two arrays of fast EDO DRAM (35ns). The DRAMs are used to store
the incoming/outgoing packets as well as the address table and other device data structures. The interface to EDO
DRAM is glueless; all signals needed to control EDO devices are included. For more information, see
Section 17. The
35ns EDO DRAMs required for 66MHz operation are available from several vendors including Silicon Magic
(www.simagic.com) and Mosel-Vitelic (www.mosel-vitelic.com). These high-speed DRAMs are priced at almost the
same cost as standard 60ns EDOs.
NOTE: Each bank of EDO is used to service 2 Fast Ethernet Ports. Bank A supports ports 0 and 1; Bank B sup-
ports ports 2 and 3. (The GT-48002A device required only 1 bank for 2 Fast Ethernet ports.)
1.10
Fast PCI Interface
Switch expansion and access to internal management features is possible with the GT-48004A’s PCI interface. The
GT-48004A can be either a master initiating a PCI bus operation or a target responding to a PCI bus operation. Up to
six GT-48004A devices can reside on the same PCI bus segment, forwarding packets from one port to the other with-
out CPU intervention. By using PCI-to-PCI bridge devices1, the switch can be expanded to up to 32 GalNet devices.
The PCI bus may also used to connect to an optional CPU for management, or to connect other high speed LAN adapt-
ers such as ATM and FDDI.
NOTE: The GT-48004A uses a Fast PCI bus which is clocked between 33MHz and 66MHz.
1. 32 to 64 bit PCI bridges are recommended when bridging several devices for additional bandwidth. Contact Galileo for more informa-
tion.