- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄67672 > GT-48004A (Galileo Technology Services, LLC) Four Port Switched Fast Ethernet Controller(四端口、交換式快速以太網(wǎng)控制器) PDF資料下載
參數(shù)資料
| 型號： | GT-48004A |
| 廠商： | Galileo Technology Services, LLC |
| 英文描述： | Four Port Switched Fast Ethernet Controller(四端口、交換式快速以太網(wǎng)控制器) |
| 中文描述： | 四端口交換式快速以太網(wǎng)控制器（四端口，交換式快速以太網(wǎng)控制器） |
| 文件頁數(shù)： | 74/106頁 |
| 文件大小： | 953K |
| 代理商： | GT-48004A |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁當(dāng)前第74頁第75頁第76頁第77頁第78頁第79頁第80頁第81頁第82頁第83頁第84頁第85頁第86頁第87頁第88頁第89頁第90頁第91頁第92頁第93頁第94頁第95頁第96頁第97頁第98頁第99頁第100頁第101頁第102頁第103頁第104頁第105頁第106頁
GT-48004A Four Port Switched Fast Ethernet Controller
7
Revision 1.0
N:\Marketing\Docs\Archive\48004A\DATASHEET\Rev 1.0\484ads10.fm
1.
Functional Overview
The GT-48004A is a high-performance, low-cost, Switched Fast Ethernet Controller that provides packet switching
functions between four, on-chip, 10/100Mbps, auto-negotiated ports and the 2 Gbps Fast PCI backplane. The GT-
48004A uses the innovative GalNet Switching Architecture to allow expansion to additional Ethernet and Fast Ether-
net ports.
The GT-48004A is a higher-speed derivative of the two-port GT-48002A. Two GT-48002A functional blocks are inte-
grated into the GT-48004A and the following enhancements are added:
The DRAM bus bandwidth is doubled from the GT-48002A (35 ns EDO DRAMs are used versus 70 ns on the
GT-48002A)
A 66MHz Fast PCI bus is used for interconnect on the GT-48004A versus a standard 33MHz PCI bus on the
GT-48002A. Galileo will be offering the GT-64120 device which will bridge between 64-bit MIPS processors
and Fast PCI.
From a software standpoint, the GT-48004A looks like two independent GT-48002A devices, thus making software
migration extremely simple for customers already using GalNet Architecture Devices.
The GT-48004A integrates two GT-48002A Fast Ethernet Switch units, and each unit is given separate access to the
PCI bus. This means that from a hardware point of view, the GT-48004A looks like two GT-48002A devices sharing the
“bussed” PCI signals. Non-bussed PCI signals (like IdSel*) are brought to separate package pins. See below for more
details.
Some features were deleted from the GT-48002A functionality in the GT-48004A. The parallel LED interface was
removed due to pinout constraints. The RMON FIFO support was also removed; primarily because it is almost never
used and it take 2 pins. All RMON/SNMP counter functionality remains in the GT-48004A.
1.1
The GalNet Switching Architecture
The GalNet Switching Architecture is based on a proprietary messaging protocol using the industry standard PCI bus
as a medium. GalNet devices are designed to connect seamlessly allowing packets to be switched between devices
without processor intervention (see Figure 1). Each GalNet device acts as an intelligent agent, sharing information
between all other devices in the system. For example, when one GalNet device learns a new address, it automatically
updates all other GalNet devices via the NEW_ADDRESS message. GalNet messages are defined as
write-only
(request/response) in order to achieve the maximum bandwidth from the PCI bus.
The GalNet Architecture Family currently consists of three products: the GT-48001A (eight ports of 10BaseX), the GT-
48002A (two ports of 100BaseX), and the GT-480031 (two ports of 100VG-AnyLAN). In addition, Galileo Technology
provides a number of other complementary PCI interface products for popular microprocessors.
1.2
Fast Ethernet Ports
The GT-48004A integrates four Fast Ethernet ports. Each port works at 10/100Mbps (half-duplex) or 20/200Mbps (full-
duplex). Four Media Independent Interfaces (MII) are provided for glueless connection to off-the-shelf PHY chips. The
GT-48004A supports full auto-negotiation for capable PHYs. Therefore, the speed (10 or 100 Mbps) and duplex (half or
full) which the PHY resolves to operate is automatically reported to the GT-48004A in both managed and unmanaged
systems. The port can also be forced to operate in a certain mode, if so desired. Each port includes the Media Access
Control function (MAC) and six LEDs for Link Status, Collision, Receive Transmit, Half/Full Duplex and Receive Buffer
Full indications. The GT-48004A incorporates full MII management support. The MDC/MDIO pins are directly con-
trolled by the CPU.
1. The GT-48003 is now obsolete.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| GT-48006A | Low Cost Two Port 10/100Mbps Ethernet Bridge/Switch Controller(低成本、雙端口10/100Mbps以太網(wǎng)橋式/交換式控制器) |
| GT-48207 | Advanced Switched Ethernet Controllers for 10+10/100 BaseX(高級交換式 10+10/100 BaseX以太網(wǎng)控制器) |
| GT-48208 | Advanced Switched Ethernet Controllers for 10+10/100 BaseX(高級交換式 10+10/100 BaseX以太網(wǎng)控制器) |
| GT-48212 | Advanced Switched Ethernet Controllers for 10+10/100 BaseX(高級交換式 10+10/100 BaseX以太網(wǎng)控制器) |
| GT-64010A | System Controller with PCI Interface for R4XXX/ R5000 Family CPUs(帶PCI接口用于R4XXX/ R5000 系列 CPUs的系統(tǒng)控制器) |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| GT482 | 制造商:CORNELL DUBILIER ELECTRONICS 功能描述:Cap Ceramic 82pF 3000V SL 5% (12 X 6mm) Radial 9.5mm 85°C |
| GT48212-A6-PBB1C000 | 制造商:Marvell 功能描述: |
| GT48212-A6-PBB-C000 | 制造商:Marvell 功能描述:12 PORT E + 2 PORT FE SWITCH (MANAGED) - Trays |
| GT48300-A1-BBE1C083 | 制造商:Marvell 功能描述:Marvell GT48300-A1-BBE1C083 |
| GT48300-A1-BBE-C000 | 制造商:Marvell 功能描述:Marvell GT48300-A1-BBE-C000 |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。