- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄67672 > GT-48004A (Galileo Technology Services, LLC) Four Port Switched Fast Ethernet Controller(四端口、交換式快速以太網(wǎng)控制器) PDF資料下載
參數(shù)資料
| 型號： | GT-48004A |
| 廠商： | Galileo Technology Services, LLC |
| 英文描述： | Four Port Switched Fast Ethernet Controller(四端口、交換式快速以太網(wǎng)控制器) |
| 中文描述： | 四端口交換式快速以太網(wǎng)控制器（四端口，交換式快速以太網(wǎng)控制器） |
| 文件頁數(shù)： | 51/106頁 |
| 文件大?。?/td> | 953K |
| 代理商： | GT-48004A |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁當(dāng)前第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁第81頁第82頁第83頁第84頁第85頁第86頁第87頁第88頁第89頁第90頁第91頁第92頁第93頁第94頁第95頁第96頁第97頁第98頁第99頁第100頁第101頁第102頁第103頁第104頁第105頁第106頁
GT-48004A Four Port Switched Fast Ethernet Controller
49
Revision 1.0
N:\Marketing\Docs\Archive\48004A\DATASHEET\Rev 1.0\484ads10.fm
determined the theoretical maximum PCI bus loading for each 100Mbps port (see Table 23.) The bandwidth numbers
shown in this table take into account overhead for the GalNet protocol, as well as overhead for the PCI bus itself (arbi-
tration, clocks/transfer, etc.)
Please note that the DRAM bandwidth limitations seen in some GT-48002A systems are lessened (or eliminated) in the
GT-48004A due to the double speed memory interface.
12.6
Plug-and-Play Considerations In PCI Systems
The GT-48004A is not suited to Plug and Play configurations where the GT-48004A sits directly on the x86 PCI
bus. Customers wanting to build PC based switches are urged to use either a GT-64120 (aka GT-146H) or Intel
i960RP device as a “front end”
12.7
PCI Bus in Stand-Alone Systems
Stand-alone applications still require use of the PCI bus for forwarding packets between FEUs. The PCI bus pins must
be connected as shown in Table 24 to insure proper operation. All pull-up and pull-down resistors should have a value
of 4.7K
. Be sure to have your own reset and PCI clock on-board.
1. Maximum number of ports to guarantee 0% packet loss at worst case loading conditions.
Table 23: PCI Bandwidth Estimates
Pack et Leng th
Maximu m P CI B a ndwi d th
R e qu ir ed per FU LL D UP L E X
1 00Mbp s P o r t
Maxi mum Nu mber o f 1 00Mbp s P o r t s
p e r PC I Bu s wit h 0 % P acket Lo ss a t
Wo r s t Ca s e L o a d 1
64
TBD
128
TBD
256
TBD
512
TBD
1024
TBD
Table 24: Pin Strapping Requirements for PCI Signals in 4-Port Applications
Pi n Na m e
St ra ppi ng
DevSel*
Pull up
Stop*
Pull up
Par*
Pull up
PErr*
Pull up
Frame*
Pull up
IRdy*
Pull up
TRdy*
Pull up
Gnt0/1*
Connect to PAL arbiter. NOTE: One of the two Gnt* signals MUST
be asserted at all times. This ensures that one of the two FEUs is
“parked” on the PCI bus, per the PCI bus spec.
IdSel0/1
Pull down
SErr*
Float
Req0/1*
Connect to PAL arbiter
Int*
Float
AD[31:0]
Float
CBE[3:0]
Float
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| GT-48006A | Low Cost Two Port 10/100Mbps Ethernet Bridge/Switch Controller(低成本、雙端口10/100Mbps以太網(wǎng)橋式/交換式控制器) |
| GT-48207 | Advanced Switched Ethernet Controllers for 10+10/100 BaseX(高級交換式 10+10/100 BaseX以太網(wǎng)控制器) |
| GT-48208 | Advanced Switched Ethernet Controllers for 10+10/100 BaseX(高級交換式 10+10/100 BaseX以太網(wǎng)控制器) |
| GT-48212 | Advanced Switched Ethernet Controllers for 10+10/100 BaseX(高級交換式 10+10/100 BaseX以太網(wǎng)控制器) |
| GT-64010A | System Controller with PCI Interface for R4XXX/ R5000 Family CPUs(帶PCI接口用于R4XXX/ R5000 系列 CPUs的系統(tǒng)控制器) |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| GT482 | 制造商:CORNELL DUBILIER ELECTRONICS 功能描述:Cap Ceramic 82pF 3000V SL 5% (12 X 6mm) Radial 9.5mm 85°C |
| GT48212-A6-PBB1C000 | 制造商:Marvell 功能描述: |
| GT48212-A6-PBB-C000 | 制造商:Marvell 功能描述:12 PORT E + 2 PORT FE SWITCH (MANAGED) - Trays |
| GT48300-A1-BBE1C083 | 制造商:Marvell 功能描述:Marvell GT48300-A1-BBE1C083 |
| GT48300-A1-BBE-C000 | 制造商:Marvell 功能描述:Marvell GT48300-A1-BBE-C000 |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。