參數(shù)資料
型號: LR4500
廠商: LSI Corporation
英文描述: Superscalar Microprocessor(超標(biāo)量微處理器)
中文描述: 超標(biāo)量微處理器(超標(biāo)量微處理器)
文件頁數(shù): 38/172頁
文件大小: 1142K
代理商: LR4500
4-2
Instruction Set
Branch Likely Instructions
, in
Table 4.10
on
page 4-11
Trap Instructions
, in
Table 4.11
on
page 4-12
Special Instructions
, in
Table 4.12
on
page 4-13
CP0 Instructions
, in
Table 4.13
on
page 4-13
Cache Maintenance Instructions
, in
Table 4.14
on
page 4-14
Table 4.1
describes the load and store instructions.
Table 4.1 Load and Store Instructions
Instruction
Format and Description
Load Byte
LB rt, offset(base)
Sign extend the 16-bit
offset
and add to the contents of register
base
to
form address. Sign extend the contents of addressed byte and load into
rt
.
Load Byte Unsigned
LBU rt, offset(base)
Sign extend the 16-bit
offset
and add to the contents of register
base
to
form address. Zero extend the contents of addressed byte and load into
rt
.
Load Halfword
LH rt, offset(base)
Sign extend the 16-bit
offset
and add to the contents of register
base
to
form address. Sign extend the contents of addressed halfword and load
into
rt
.
Load Halfword Unsigned
LHU rt, offset(base)
Sign extend the 16-bit
offset
and add to the contents of register
base
to
form address. Zero extend contents of addressed halfword and load into
rt
.
Load Word
LW rt, offset(base)
Sign extend the 16-bit
offset
and add to the contents of register
base
to
form address, and load the addressed word into
rt
.
Load Word Left
LWL rt, offset(base)
Sign extend the 16-bit
offset
and add to the contents of register
base
to
form address. Shift addressed word left so that addressed byte is left most
byte of a word. Merge bytes from memory with contents of register
rt
and
load result into register
rt
.
Load Word Right
LWR rt, offset(base)
Sign extend the 16-bit
offset
and add to the contents of register
base
to
form address. Shift addressed word right so that addressed byte is right
most byte of a word. Merge bytes from memory with contents of register
rt
and load result into register
rt
.
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